Input/Output
Tile IO_W0
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][11] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][11] | MAIN_S[19][11] | MAIN_S[20][11] | MAIN_S[21][11] | MAIN_S[23][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][7] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_W0_N
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[15][11] | MAIN[21][11] | MAIN[20][11] | MAIN[19][11] | MAIN[13][11] | MAIN[22][11] | MAIN[23][11] | CELL.ECLK_V |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL_N.DOUBLE_IO_N2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL_N.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL_N.LONG_IO_H[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL_N.OUT_BUFGE_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_N.LONG_IO_H[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][11] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][11] | MAIN_S[19][11] | MAIN_S[20][11] | MAIN_S[21][11] | MAIN_S[23][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | CELL.OUT_IO_CLKIN | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][7] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[0].CLKIN |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_W0_F0
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][11] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][11] | MAIN_S[19][11] | MAIN_S[20][11] | MAIN_S[21][11] | MAIN_S[23][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | - | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | CELL.OUT_IO_WE_I1[0] | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][7] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].CLKIN, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_W0_F1
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][11] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][11] | MAIN_S[19][11] | MAIN_S[20][11] | MAIN_S[21][11] | MAIN_S[23][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | - |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | - | CELL.OUT_IO_WE_I1[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][7] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].CLKIN, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_W1
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][11] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][11] | MAIN_S[19][11] | MAIN_S[20][11] | MAIN_S[21][11] | MAIN_S[23][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][7] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_W1_S
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][15] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][15] | MAIN_S[19][15] | MAIN_S[20][15] | MAIN_S[21][15] | MAIN_S[23][15] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][15] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][15] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | - | CELL.OUT_IO_CLKIN |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][11] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[1].CLKIN |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B15 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_W1_F0
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][11] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][11] | MAIN_S[19][11] | MAIN_S[20][11] | MAIN_S[21][11] | MAIN_S[23][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | - | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | CELL.OUT_IO_WE_I1[0] | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][7] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].CLKIN, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_W1_F1
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_W[0] | CELL.OCTAL_IO_W[8] | !MAIN[0][11] |
| CELL.OCTAL_IO_W[8] | CELL.OCTAL_IO_W[0] | !MAIN[0][10] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[3] | !MAIN[8][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[4][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[5][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[5][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[2] | !MAIN[17][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][8] |
| CELL.SINGLE_H[4] | CELL.DEC_V[1] | !MAIN[16][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][4] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[7][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][4] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[9][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[2][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[0] | !MAIN[9][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[1][8] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[3][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][6] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[6][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[3][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DBUF_IO_V[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DBUF_IO_V[1] | !MAIN[11][6] |
| CELL.DOUBLE_IO_W0[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DBUF_IO_V[1] | !MAIN[4][6] |
| CELL.DOUBLE_IO_W2[0] | CELL.DBUF_IO_V[0] | !MAIN[7][6] |
| CELL.DOUBLE_IO_W2[1] | CELL.DBUF_IO_V[0] | !MAIN[10][7] |
| CELL.DOUBLE_IO_W2[2] | CELL.DBUF_IO_V[0] | !MAIN[9][6] |
| CELL.DOUBLE_IO_W2[3] | CELL.DBUF_IO_V[0] | !MAIN[9][7] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[7][10] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[11][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[4][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[2][10] |
| CELL.QUAD_H2[0] | CELL.DEC_V[0] | !MAIN[8][11] |
| CELL.QUAD_H2[1] | CELL.DEC_V[1] | !MAIN[6][11] |
| CELL.QUAD_H2[2] | CELL.DEC_V[2] | !MAIN[10][11] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[1][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[1][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[6][10] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[9][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[7][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_W[1] | !MAIN[0][4] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W0[0] | !MAIN[10][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_W2[0] | !MAIN[1][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_W[2] | !MAIN[0][3] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_W1[1] | !MAIN[14][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_W[3] | !MAIN[0][8] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_W2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_W[4] | !MAIN[0][7] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_W1[2] | !MAIN[12][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_W[5] | !MAIN[0][2] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W0[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_W2[2] | !MAIN[9][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_W[6] | !MAIN[0][5] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_W1[3] | !MAIN[5][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_W[7] | !MAIN[0][6] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W0[3] | !MAIN[7][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_W2[3] | !MAIN[1][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_W[0] | !MAIN[0][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W0[0] | !MAIN[9][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W1[0] | !MAIN[6][5] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[3][5] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W0[3] | !MAIN[6][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W1[3] | !MAIN[4][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_W2[3] | !MAIN[2][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_W2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W0[2] | !MAIN[12][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W1[2] | !MAIN[11][3] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_W2[2] | !MAIN[10][4] |
| CELL.DOUBLE_IO_W0[0] | CELL.DOUBLE_IO_W2[0] | !MAIN[4][5] |
| CELL.DOUBLE_IO_W0[1] | CELL.DOUBLE_IO_W2[1] | !MAIN[12][9] |
| CELL.DOUBLE_IO_W0[2] | CELL.DOUBLE_IO_W2[2] | !MAIN[11][4] |
| CELL.DOUBLE_IO_W0[3] | CELL.DOUBLE_IO_W2[3] | !MAIN[3][9] |
| CELL.DOUBLE_IO_W1[0] | CELL.QUAD_H1[0] | !MAIN[3][11] |
| CELL.DOUBLE_IO_W1[1] | CELL.QUAD_H2[1] | !MAIN[7][11] |
| CELL.DOUBLE_IO_W1[2] | CELL.QUAD_H2[2] | !MAIN[11][11] |
| CELL.DOUBLE_IO_W1[3] | CELL.QUAD_H0[2] | !MAIN[3][10] |
| CELL.DOUBLE_IO_W2[0] | CELL.QUAD_H2[0] | !MAIN[9][11] |
| CELL.DOUBLE_IO_W2[1] | CELL.QUAD_H0[0] | !MAIN[8][10] |
| CELL.DOUBLE_IO_W2[2] | CELL.QUAD_H1[1] | !MAIN[5][11] |
| CELL.DOUBLE_IO_W2[3] | CELL.QUAD_H1[2] | !MAIN[4][11] |
| CELL.QUAD_H3[0] | CELL.LONG_IO_V[3] | !MAIN[5][10] |
| CELL.QUAD_H3[1] | CELL.LONG_IO_V[2] | !MAIN[2][11] |
| CELL.QUAD_H3[2] | CELL.LONG_IO_V[1] | !MAIN[10][10] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][2] | MAIN[4][2] | MAIN[5][3] | MAIN[4][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][8] | MAIN[18][8] | MAIN[19][8] | MAIN[16][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_W2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_W2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][1] | MAIN[1][1] | MAIN[1][0] | MAIN[2][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[16][1] | MAIN[15][1] | MAIN[16][0] | MAIN[15][0] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[2][6] | MAIN[1][6] | MAIN[4][7] | MAIN[2][7] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[11][7] | MAIN[5][6] | MAIN[7][7] | MAIN[6][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[5][5] | MAIN[2][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[14][8] | MAIN[12][8] | MAIN[13][8] | MAIN[18][9] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][8] | MAIN[3][8] | MAIN[5][8] | MAIN[4][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[7][8] | MAIN[10][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[16][10] | MAIN[16][11] | CELL.IMUX_CLB_F2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.LONG_V[9] |
| 1 | 1 | CELL_E.GCLK[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[14][11] | MAIN[14][10] | CELL.IMUX_CLB_G2 |
| Source | ||
| 0 | 0 | CELL_E.LONG_V[6] |
| 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | CELL_E.LONG_V[9] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[18][10] | MAIN[17][10] | MAIN[18][11] | MAIN[19][10] | MAIN[17][11] | CELL.IMUX_CLB_C2 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | CELL_E.LONG_V[5] |
| 1 | 1 | 0 | 1 | 1 | CELL_E.LONG_V[7] |
| 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[3][1] | MAIN[3][0] | MAIN[5][1] | MAIN[5][0] | MAIN[4][0] | MAIN[4][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][0] | MAIN[14][1] | MAIN[12][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[6][1] | MAIN[7][0] | MAIN[6][0] | MAIN[9][0] | MAIN[7][1] | MAIN[8][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[8][1] | MAIN[9][1] | MAIN[11][1] | MAIN[11][0] | MAIN[10][0] | MAIN[10][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][8] | MAIN[21][9] | MAIN[24][10] | MAIN[19][9] | MAIN[20][9] | MAIN[21][10] | MAIN[20][10] | MAIN[20][8] | MAIN[23][10] | MAIN[21][8] | MAIN[22][10] | MAIN[25][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[17][1] | MAIN[21][0] | MAIN_S[24][11] | MAIN[20][0] | MAIN[19][0] | MAIN[17][0] | MAIN[18][0] | MAIN_S[22][11] | MAIN_S[19][11] | MAIN_S[20][11] | MAIN_S[21][11] | MAIN_S[23][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C2 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][6] | MAIN[18][5] | MAIN[19][6] | MAIN[13][6] | MAIN[16][6] | MAIN[15][6] | MAIN[12][6] | MAIN[17][6] | MAIN[13][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[12][2] | MAIN[19][2] | MAIN[18][2] | MAIN[14][2] | MAIN[20][2] | MAIN[13][2] | MAIN[17][2] | MAIN[21][2] | MAIN_S[13][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[14][7] | MAIN[21][7] | MAIN[15][7] | MAIN[17][7] | MAIN[19][7] | MAIN[18][7] | MAIN[16][7] | MAIN[20][7] | MAIN[15][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[15][3] | MAIN[19][1] | MAIN[19][3] | MAIN[15][2] | MAIN[20][1] | MAIN[18][1] | MAIN[21][1] | MAIN[16][2] | MAIN_S[15][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F2 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][3] | MAIN[5][2] | MAIN[8][4] | MAIN[3][3] | MAIN[7][2] | MAIN[7][3] | MAIN[6][2] | MAIN[6][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[3][2] | MAIN[1][2] | MAIN[8][2] | MAIN[9][3] | MAIN[10][3] | MAIN[12][3] | MAIN[10][2] | MAIN[11][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_W0[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_W1[0] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[1][3] | !MAIN[13][3] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[24][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[24][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[25][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[24][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G3_W | CELL.IMUX_CLB_F3_W |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[26][9] | CELL.IMUX_IO_T[1] invert by !MAIN[25][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | - |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | - | CELL.OUT_IO_WE_I1[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[23][6] | !MAIN[17][3] |
| OFF_SRVAL bit 0 | !MAIN[25][7] | !MAIN[25][1] |
| READBACK_I1 bit 0 | !MAIN[26][8] | !MAIN[22][3] |
| READBACK_I2 bit 0 | !MAIN[24][8] | !MAIN[23][3] |
| READBACK_OQ bit 0 | !MAIN[23][8] | !MAIN[24][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[23][7] | !MAIN[25][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[22][7] | MAIN[23][2] |
| IFF_CE_ENABLE | !MAIN[8][8] | !MAIN[8][7] |
| OFF_CE_ENABLE | !MAIN[8][9] | !MAIN[8][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[26][11] | !MAIN[26][10] |
| IO[0].SLEW | MAIN[24][9] |
|---|---|
| IO[1].SLEW | MAIN[26][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[18][6] | MAIN[24][7] |
|---|---|---|
| IO[1].PULL | MAIN[26][1] | MAIN[24][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[24][5] | MAIN[23][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[26][4] | MAIN[23][4] |
| IO[0].MUX_I2 | MAIN[26][5] | MAIN[25][6] |
| IO[1].MUX_I2 | MAIN[25][4] | MAIN[25][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[25][5] | MAIN[26][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[24][4] | MAIN[26][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[26][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[26][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[25][8] | MAIN[22][8] | MAIN[23][9] | MAIN[22][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[23][1] | MAIN[22][1] | MAIN[23][0] | MAIN[22][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[22][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C3_W | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[14][4] | !MAIN[14][5] | MAIN[15][5] |
| O1_N | MAIN[14][3] | MAIN[14][6] | !MAIN[15][4] |
| O2_P | !MAIN[20][3] | !MAIN[20][6] | MAIN[19][4] |
| O2_N | MAIN[20][4] | MAIN[20][5] | !MAIN[19][5] |
| O3_P | !MAIN[16][4] | !MAIN[18][3] | MAIN[17][4] |
| O3_N | MAIN[16][3] | MAIN[18][4] | !MAIN[17][5] |
| O4_P | !MAIN[21][4] | !MAIN[21][6] | MAIN[22][5] |
| O4_N | MAIN[21][3] | MAIN[21][5] | !MAIN[22][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[1][7] | !MAIN[12][7] |
Bels MISC_W
| Pin | Direction | MISC_W |
|---|
| Attribute | MISC_W |
|---|---|
| PUMP | [enum: PUMP] |
| MISC_W.PUMP | MAIN[0][0] |
|---|---|
| INTERNAL | 1 |
| EXTERNAL | 0 |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F3_W | IO[1].O2 |
| CELL.IMUX_CLB_G3_W | IO[0].O2 |
| CELL.IMUX_CLB_C3_W | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].CLKIN, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E0
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][8] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][8] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][9] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][11] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][11] | MAIN_S[6][11] | MAIN_S[8][11] | MAIN_S[9][11] | MAIN_S[11][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][11] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][7] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E0_N
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][8] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][8] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][9] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[7][11] | MAIN[8][11] | MAIN[12][11] | MAIN[14][11] | MAIN[6][11] | MAIN[9][11] | MAIN[11][11] | CELL.ECLK_V |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL_N.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL_N.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL_N.DOUBLE_IO_E1[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL_N.OUT_BUFGE_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_N.LONG_IO_H[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][11] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][11] | MAIN_S[6][11] | MAIN_S[8][11] | MAIN_S[9][11] | MAIN_S[11][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][11] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | CELL.OUT_IO_CLKIN | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][7] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[0].CLKIN |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E0_F0
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][8] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][8] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][9] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][11] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][11] | MAIN_S[6][11] | MAIN_S[8][11] | MAIN_S[9][11] | MAIN_S[11][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][11] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | - | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | CELL.OUT_IO_WE_I1[0] | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][7] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].CLKIN, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E0_F1
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][8] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][8] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][9] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][11] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][11] | MAIN_S[6][11] | MAIN_S[8][11] | MAIN_S[9][11] | MAIN_S[11][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][11] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | - |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | - | CELL.OUT_IO_WE_I1[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][7] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].CLKIN, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E1
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][8] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][8] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][9] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][11] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][11] | MAIN_S[6][11] | MAIN_S[8][11] | MAIN_S[9][11] | MAIN_S[11][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][11] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][7] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E1_S
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][12] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][12] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][12] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][12] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][13] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][15] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][15] | MAIN_S[6][15] | MAIN_S[8][15] | MAIN_S[9][15] | MAIN_S[11][15] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][15] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][15] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][15] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | CELL.OUT_IO_CLKIN | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][13] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[0].CLKIN |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E1_F0
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][8] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][8] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][9] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][11] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][11] | MAIN_S[6][11] | MAIN_S[8][11] | MAIN_S[9][11] | MAIN_S[11][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][11] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | - | CELL.OUT_IO_WE_I1[1] |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | CELL.OUT_IO_WE_I1[0] | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][7] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].CLKIN, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_E1_F1
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_E[0] | CELL.OCTAL_IO_E[8] | !MAIN[26][10] |
| CELL.OCTAL_IO_E[8] | CELL.OCTAL_IO_E[0] | !MAIN[26][11] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[27][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[31][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[28][4] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[28][6] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[39][4] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[41][6] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[33][4] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[39][8] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[35][6] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[35][4] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[32][6] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[36][8] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[44][7] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[43][7] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[49][7] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[50][7] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.DEC_V[0] | !MAIN[18][5] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[24][4] |
| CELL.SINGLE_H[1] | CELL.LONG_IO_V[0] | !MAIN[22][4] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[21][4] |
| CELL.SINGLE_H[2] | CELL.LONG_IO_V[1] | !MAIN[13][7] |
| CELL.SINGLE_H[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[21][7] |
| CELL.SINGLE_H[3] | CELL.DEC_V[1] | !MAIN[9][9] |
| CELL.SINGLE_H[3] | CELL.OUT_IO_WE_I1_S1 | !MAIN[15][8] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[34][4] |
| CELL.SINGLE_H[4] | CELL.DEC_V[2] | !MAIN[10][5] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_WE_I2_S1 | !MAIN[25][4] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[28][3] |
| CELL.SINGLE_H[5] | CELL.LONG_IO_V[2] | !MAIN[19][4] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_WE_I2[0] | !MAIN[20][4] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[35][9] |
| CELL.SINGLE_H[6] | CELL.LONG_IO_V[3] | !MAIN[17][8] |
| CELL.SINGLE_H[6] | CELL.OUT_IO_WE_I1[0] | !MAIN[24][8] |
| CELL.SINGLE_H[7] | CELL.DEC_V[3] | !MAIN[17][9] |
| CELL.SINGLE_H[7] | CELL.OUT_IO_WE_I1_S1 | !MAIN[25][8] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[47][7] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[33][5] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[41][9] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[40][7] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[42][7] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[48][6] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[49][6] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[27][6] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[29][4] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[29][8] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[30][4] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[35][8] |
| CELL.SINGLE_V[2] | CELL.OUT_CLB_Y_E | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[34][9] |
| CELL.SINGLE_V[3] | CELL.OUT_CLB_YQ_E | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[27][7] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_WE_I2[0] | !MAIN[40][3] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[41][5] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_WE_I2[1] | !MAIN[37][4] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[41][7] |
| CELL.SINGLE_V[6] | CELL.OUT_CLB_Y_E | !MAIN[40][4] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[27][9] |
| CELL.SINGLE_V[7] | CELL.OUT_CLB_YQ_E | !MAIN[39][3] |
| CELL.DOUBLE_H0[0] | CELL.OUT_IO_WE_I1[0] | !MAIN[20][7] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_WE_I2_S1 | !MAIN[23][4] |
| CELL.DOUBLE_H1[0] | CELL.OUT_IO_WE_I1_S1 | !MAIN[23][7] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[23][6] |
| CELL.DOUBLE_V0[0] | CELL.OUT_CLB_YQ_E | !MAIN[27][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_WE_I2[1] | !MAIN[38][4] |
| CELL.DOUBLE_V1[0] | CELL.OUT_CLB_Y_E | !MAIN[32][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_WE_I2[0] | !MAIN[41][4] |
| CELL.DOUBLE_IO_E0[0] | CELL.DBUF_IO_V[0] | !MAIN[19][6] |
| CELL.DOUBLE_IO_E0[1] | CELL.DBUF_IO_V[0] | !MAIN[16][7] |
| CELL.DOUBLE_IO_E0[2] | CELL.DBUF_IO_V[0] | !MAIN[17][6] |
| CELL.DOUBLE_IO_E0[3] | CELL.DBUF_IO_V[0] | !MAIN[17][7] |
| CELL.DOUBLE_IO_E2[0] | CELL.DBUF_IO_V[1] | !MAIN[15][5] |
| CELL.DOUBLE_IO_E2[1] | CELL.DBUF_IO_V[1] | !MAIN[15][6] |
| CELL.DOUBLE_IO_E2[2] | CELL.DBUF_IO_V[1] | !MAIN[13][4] |
| CELL.DOUBLE_IO_E2[3] | CELL.DBUF_IO_V[1] | !MAIN[22][6] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[45][10] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][10] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[42][9] |
| CELL.QUAD_H0[1] | CELL.OUT_IO_WE_I1_S1 | !MAIN[17][11] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[51][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][10] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_WE_I2_S1 | !MAIN[21][10] |
| CELL.QUAD_H1[0] | CELL.DEC_V[3] | !MAIN[5][10] |
| CELL.QUAD_H1[1] | CELL.DEC_V[2] | !MAIN[5][11] |
| CELL.QUAD_H1[2] | CELL.DEC_V[1] | !MAIN[16][10] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_WE_I2_S1 | !MAIN[19][10] |
| CELL.QUAD_H3[1] | CELL.OUT_IO_WE_I1[0] | !MAIN[22][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[3][11] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_WE_I1_S1 | !MAIN[16][11] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[44][10] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[44][9] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[50][10] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[46][10] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_WE_I2[1] | !MAIN[47][4] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[42][10] |
| CELL.QUAD_V0[1] | CELL.OUT_CLB_YQ_E | !MAIN[50][4] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[51][11] |
| CELL.QUAD_V0[2] | CELL.OUT_CLB_Y_E | !MAIN[45][4] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_WE_I2[0] | !MAIN[42][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_WE_I2[0] | !MAIN[43][0] |
| CELL.QUAD_V3[1] | CELL.OUT_CLB_Y_E | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_CLB_YQ_E | !MAIN[49][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_WE_I2[1] | !MAIN[48][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[43][10] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[43][9] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[49][10] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[29][6] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[28][5] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[31][3] |
| CELL.SINGLE_H[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[19][5] |
| CELL.SINGLE_H[0] | CELL.OCTAL_IO_E[7] | !MAIN[26][4] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[31][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[30][5] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[30][3] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E0[0] | !MAIN[25][5] |
| CELL.SINGLE_H[1] | CELL.DOUBLE_IO_E2[0] | !MAIN[16][5] |
| CELL.SINGLE_H[1] | CELL.OCTAL_IO_E[6] | !MAIN[26][3] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[33][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[32][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[34][8] |
| CELL.SINGLE_H[2] | CELL.DOUBLE_IO_E1[1] | !MAIN[12][9] |
| CELL.SINGLE_H[2] | CELL.OCTAL_IO_E[5] | !MAIN[26][8] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[32][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[29][7] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[31][7] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E0[1] | !MAIN[16][9] |
| CELL.SINGLE_H[3] | CELL.DOUBLE_IO_E2[1] | !MAIN[10][9] |
| CELL.SINGLE_H[3] | CELL.OCTAL_IO_E[4] | !MAIN[26][7] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[37][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[40][6] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[36][6] |
| CELL.SINGLE_H[4] | CELL.DOUBLE_IO_E1[2] | !MAIN[14][4] |
| CELL.SINGLE_H[4] | CELL.OCTAL_IO_E[3] | !MAIN[26][2] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[36][5] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[37][3] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[38][5] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E0[2] | !MAIN[17][4] |
| CELL.SINGLE_H[5] | CELL.DOUBLE_IO_E2[2] | !MAIN[13][5] |
| CELL.SINGLE_H[5] | CELL.OCTAL_IO_E[2] | !MAIN[26][5] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[36][7] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[37][8] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[37][7] |
| CELL.SINGLE_H[6] | CELL.DOUBLE_IO_E1[3] | !MAIN[21][9] |
| CELL.SINGLE_H[6] | CELL.OCTAL_IO_E[1] | !MAIN[26][6] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[39][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[36][9] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[38][8] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E0[3] | !MAIN[25][9] |
| CELL.SINGLE_H[7] | CELL.DOUBLE_IO_E2[3] | !MAIN[19][9] |
| CELL.SINGLE_H[7] | CELL.OCTAL_IO_E[8] | !MAIN[26][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[27][5] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[29][5] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[48][7] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[31][6] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[32][5] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[46][7] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[32][9] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[33][9] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[42][8] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[33][7] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[34][7] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[50][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[40][8] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[38][6] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[45][7] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[37][5] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[39][5] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[47][8] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[35][7] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[38][7] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[48][8] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[38][9] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[40][9] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[43][8] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[30][6] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[32][3] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[31][9] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[28][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[39][6] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[40][5] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[39][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[37][9] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[34][11] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[35][10] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[35][11] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[36][10] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[38][11] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[39][10] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[37][11] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[37][10] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[30][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[28][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[29][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E0[1] | !MAIN[15][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E1[1] | !MAIN[13][9] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_IO_E2[1] | !MAIN[11][9] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[34][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[33][6] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[34][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E0[2] | !MAIN[16][4] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E1[2] | !MAIN[15][3] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_IO_E2[2] | !MAIN[14][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E0[0] | !MAIN[23][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E1[0] | !MAIN[20][5] |
| CELL.DOUBLE_H1[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[17][5] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E0[3] | !MAIN[24][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E1[3] | !MAIN[22][9] |
| CELL.DOUBLE_H1[1] | CELL.DOUBLE_IO_E2[3] | !MAIN[20][9] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[45][8] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[30][7] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[30][8] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[44][8] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[34][5] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[35][5] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[28][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[35][3] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[38][10] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[34][10] |
| CELL.DOUBLE_IO_E0[0] | CELL.DOUBLE_IO_E2[0] | !MAIN[22][5] |
| CELL.DOUBLE_IO_E0[0] | CELL.QUAD_H3[0] | !MAIN[18][10] |
| CELL.DOUBLE_IO_E0[1] | CELL.DOUBLE_IO_E2[1] | !MAIN[14][9] |
| CELL.DOUBLE_IO_E0[1] | CELL.QUAD_H1[0] | !MAIN[4][10] |
| CELL.DOUBLE_IO_E0[2] | CELL.DOUBLE_IO_E2[2] | !MAIN[15][4] |
| CELL.DOUBLE_IO_E0[2] | CELL.QUAD_H1[1] | !MAIN[4][11] |
| CELL.DOUBLE_IO_E0[3] | CELL.DOUBLE_IO_E2[3] | !MAIN[23][9] |
| CELL.DOUBLE_IO_E0[3] | CELL.QUAD_H2[2] | !MAIN[19][11] |
| CELL.DOUBLE_IO_E1[0] | CELL.QUAD_H2[0] | !MAIN[23][11] |
| CELL.DOUBLE_IO_E1[1] | CELL.QUAD_H2[1] | !MAIN[21][11] |
| CELL.DOUBLE_IO_E1[2] | CELL.QUAD_H3[2] | !MAIN[2][11] |
| CELL.DOUBLE_IO_E1[3] | CELL.QUAD_H1[2] | !MAIN[17][10] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[43][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[44][11] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[40][11] |
| CELL.QUAD_H0[0] | CELL.LONG_IO_V[3] | !MAIN[2][10] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[49][8] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[47][9] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[48][9] |
| CELL.QUAD_H0[1] | CELL.LONG_IO_V[2] | !MAIN[18][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[49][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[50][11] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[46][11] |
| CELL.QUAD_H0[2] | CELL.LONG_IO_V[1] | !MAIN[20][10] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[42][11] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[41][11] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[50][9] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[51][9] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[48][11] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[47][11] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[39][11] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[49][9] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[45][11] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[21][3] | MAIN[24][2] | MAIN[22][2] | MAIN[22][3] | CELL.DBUF_IO_V[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][8] | MAIN[9][8] | MAIN[11][8] | MAIN[10][8] | CELL.DBUF_IO_V[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_E0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_E0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E0[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][10] | MAIN[41][10] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[45][9] | MAIN[46][9] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[47][10] | MAIN[48][10] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][1] | MAIN[24][0] | MAIN[25][1] | MAIN[25][0] | CELL.LONG_H[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[10][1] | MAIN[10][0] | MAIN[11][0] | MAIN[11][1] | CELL.LONG_H[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[24][6] | MAIN[22][7] | MAIN[24][7] | MAIN[25][6] | CELL.LONG_H[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[15][7] | MAIN[19][7] | MAIN[21][6] | MAIN[20][6] | CELL.LONG_H[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[21][5] | MAIN[24][5] | CELL.LONG_IO_V[0] |
| Source | ||
| 0 | 0 | CELL.LONG_H[0] |
| 0 | 1 | CELL.SINGLE_H[1] |
| 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[12][8] | MAIN[8][9] | MAIN[13][8] | MAIN[14][8] | CELL.LONG_IO_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[3] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[20][8] | MAIN[21][8] | MAIN[23][8] | MAIN[22][8] | CELL.LONG_IO_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_H[2] |
| 0 | 0 | 1 | 0 | CELL.LONG_H[4] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |
|---|---|---|
| MAIN[19][8] | MAIN[16][8] | CELL.LONG_IO_V[3] |
| Source | ||
| 0 | 0 | CELL.LONG_H[5] |
| 0 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | off |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[32][2] | MAIN[34][0] | MAIN[33][1] | MAIN[32][0] | MAIN[33][3] | MAIN[32][1] | MAIN[33][0] | MAIN[33][2] | MAIN[47][2] | MAIN[51][0] | MAIN[42][1] | MAIN[49][2] | MAIN[46][2] | MAIN[46][3] | MAIN[47][3] | MAIN[43][6] | MAIN[42][6] | CELL.IMUX_CLB_F1 |
| Source | |||||||||||||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[39][2] | MAIN[41][0] | MAIN[40][2] | MAIN[41][1] | MAIN[39][0] | MAIN[40][1] | MAIN[41][2] | MAIN[40][0] | MAIN[48][1] | MAIN[44][0] | MAIN[44][1] | MAIN[43][1] | MAIN[45][0] | MAIN[45][1] | MAIN[48][0] | MAIN[41][3] | MAIN[46][5] | MAIN[47][5] | CELL.IMUX_CLB_F3 |
| Source | ||||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| Bits | Destination | |
|---|---|---|
| MAIN[15][10] | MAIN[15][11] | CELL.IMUX_CLB_F4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[7] |
| 1 | 0 | CELL.LONG_V[9] |
| 1 | 1 | CELL.GCLK[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][0] | MAIN[27][3] | MAIN[29][0] | MAIN[29][1] | MAIN[28][1] | MAIN[27][1] | MAIN[28][0] | MAIN[27][2] | MAIN_W[1][1] | MAIN[44][4] | MAIN[43][4] | MAIN[43][3] | MAIN[46][6] | MAIN[44][3] | MAIN[50][5] | MAIN[45][5] | MAIN[44][5] | CELL.IMUX_CLB_G1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| Bits | Destination | ||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[35][0] | MAIN[34][2] | MAIN[36][1] | MAIN[34][1] | MAIN[35][2] | MAIN[36][0] | MAIN[35][1] | MAIN[36][2] | MAIN[36][3] | MAIN[48][2] | MAIN[42][2] | MAIN[44][2] | MAIN[43][2] | MAIN[45][3] | MAIN[45][2] | MAIN[51][1] | MAIN[42][3] | MAIN[48][5] | MAIN[49][5] | CELL.IMUX_CLB_G3 |
| Source | |||||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_CIN |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |
|---|---|---|
| MAIN[13][11] | MAIN[13][10] | CELL.IMUX_CLB_G4 |
| Source | ||
| 0 | 1 | CELL.LONG_V[9] |
| 1 | 0 | CELL.GCLK[4] |
| 1 | 1 | CELL.LONG_V[6] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[29][3] | MAIN[29][2] | MAIN[31][1] | MAIN[30][0] | MAIN[30][1] | MAIN[31][2] | MAIN[30][2] | MAIN[49][3] | MAIN_W[1][2] | MAIN[51][3] | MAIN[51][2] | MAIN[48][3] | MAIN[47][6] | MAIN[50][6] | MAIN[31][0] | MAIN[43][5] | MAIN[42][5] | CELL.IMUX_CLB_C1 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[37][0] | MAIN[37][1] | MAIN[38][1] | MAIN[38][0] | MAIN[37][2] | MAIN[38][2] | MAIN[38][3] | MAIN[47][1] | MAIN[49][0] | MAIN[50][0] | MAIN[49][1] | MAIN[46][1] | MAIN[46][0] | MAIN[47][0] | MAIN[39][1] | MAIN[45][6] | MAIN[44][6] | CELL.IMUX_CLB_C3 |
| Source | |||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[7] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_V1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_V2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_V3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_Y_E |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_YQ_E |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| Bits | Destination | ||||
|---|---|---|---|---|---|
| MAIN[25][10] | MAIN[24][10] | MAIN[25][11] | MAIN[23][10] | MAIN[24][11] | CELL.IMUX_CLB_C4 |
| Source | |||||
| 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 1 | 1 | 1 | 0 | 1 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][1] | MAIN[21][0] | MAIN[23][0] | MAIN[21][1] | MAIN[22][0] | MAIN[22][1] | CELL.IMUX_TBUF_I[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | CELL.DEC_V[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 1 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 1 | 0 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[12][1] | MAIN[14][1] | MAIN[12][0] | MAIN[14][0] | MAIN[13][0] | MAIN[13][1] | CELL.IMUX_TBUF_I[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[3] |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.OUT_IO_WE_I2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_IO_WE_I2[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[17][0] | MAIN[19][0] | MAIN[20][0] | MAIN[20][1] | MAIN[19][1] | MAIN[18][0] | CELL.IMUX_TBUF_T[0] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[15][0] | MAIN[17][1] | MAIN[15][1] | MAIN[18][1] | MAIN[16][0] | MAIN[16][1] | CELL.IMUX_TBUF_T[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.TIE_1 |
| 0 | 0 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][9] | MAIN[5][8] | MAIN[10][10] | MAIN[7][9] | MAIN[6][9] | MAIN[8][10] | MAIN[7][10] | MAIN[6][10] | MAIN[7][8] | MAIN[6][8] | MAIN[9][10] | MAIN[11][10] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_C4 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_H[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][0] | MAIN[5][0] | MAIN_S[7][11] | MAIN[9][1] | MAIN[7][0] | MAIN[8][0] | MAIN[9][0] | MAIN_S[10][11] | MAIN_S[6][11] | MAIN_S[8][11] | MAIN_S[9][11] | MAIN_S[11][11] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | CELL_S.LONG_IO_V[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL_S.LONG_IO_V[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL_S.LONG_IO_V[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_C4 |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[2] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_V[1] |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[7][6] | MAIN[16][6] | MAIN[8][5] | MAIN[13][6] | MAIN[10][6] | MAIN[11][6] | MAIN[14][6] | MAIN[9][6] | MAIN[12][10] | CELL.IMUX_IO_OK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][2] | MAIN[7][2] | MAIN[8][2] | MAIN[12][2] | MAIN[6][2] | MAIN[13][2] | MAIN[14][2] | MAIN[9][2] | MAIN_S[12][11] | CELL.IMUX_IO_OK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_G4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[5] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][7] | MAIN[11][7] | MAIN[12][7] | MAIN[9][7] | MAIN[7][7] | MAIN[8][7] | MAIN[10][7] | MAIN[6][7] | MAIN[14][10] | CELL.IMUX_IO_IK[0] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| MAIN[5][1] | MAIN[7][1] | MAIN[7][3] | MAIN[11][2] | MAIN[6][1] | MAIN[8][1] | MAIN[10][2] | MAIN[11][3] | MAIN_S[14][11] | CELL.IMUX_IO_IK[1] |
| Source | |||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_S.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_S.SINGLE_H[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_S.SINGLE_H[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_S.IMUX_CLB_F4 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_S.SINGLE_H[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[20][3] | MAIN[18][4] | MAIN[19][2] | MAIN[21][2] | MAIN[19][3] | MAIN[23][3] | MAIN[20][2] | MAIN[24][3] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[16][3] | MAIN[14][3] | MAIN[18][2] | MAIN[23][2] | MAIN[17][3] | MAIN[25][2] | MAIN[16][2] | MAIN[15][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_IO_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.DEC_V[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_V[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_E2[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_E2[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_V[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_V[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_E1[1] |
Bels TBUF
| Pin | Direction | TBUF[0] | TBUF[1] |
|---|---|---|---|
| I | in | CELL.IMUX_TBUF_I[0] | CELL.IMUX_TBUF_I[1] |
| T | in | CELL.IMUX_TBUF_T[0] | CELL.IMUX_TBUF_T[1] |
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | TBUF[0] | TBUF[1] |
|---|---|---|
| DRIVE1 | !MAIN[25][3] | !MAIN[13][3] |
| DRIVE1_DUP | !MAIN_S[20][11] | !MAIN[36][11] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[2][6] | CELL.IMUX_IO_IK[1] invert by !MAIN[2][3] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[1][9] | CELL.IMUX_IO_OK[1] invert by !MAIN[2][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_G1 | CELL.IMUX_CLB_F1 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[0][9] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_WE_I1[0] | - |
| I2 | out | CELL.OUT_IO_WE_I2[0] | CELL.OUT_IO_WE_I2[1] |
| CLKIN | out | - | CELL.OUT_IO_WE_I1[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[3][6] | !MAIN[9][3] |
| OFF_SRVAL bit 0 | !MAIN[1][7] | !MAIN[1][1] |
| READBACK_I1 bit 0 | !MAIN[0][8] | !MAIN[4][3] |
| READBACK_I2 bit 0 | !MAIN[2][8] | !MAIN[3][3] |
| READBACK_OQ bit 0 | !MAIN[3][8] | !MAIN[2][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[3][7] | !MAIN[1][2] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[4][7] | MAIN[3][2] |
| IFF_CE_ENABLE | !MAIN[18][8] | !MAIN[18][7] |
| OFF_CE_ENABLE | !MAIN[18][9] | !MAIN[18][6] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[0][11] | !MAIN[0][10] |
| IO[0].SLEW | MAIN[2][9] |
|---|---|
| IO[1].SLEW | MAIN[0][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[8][6] | MAIN[2][7] |
|---|---|---|
| IO[1].PULL | MAIN[0][1] | MAIN[2][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[2][5] | MAIN[1][5] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[2][4] | MAIN[0][4] |
| IO[0].MUX_I2 | MAIN[0][5] | MAIN[0][6] |
| IO[1].MUX_I2 | MAIN[1][4] | MAIN[0][3] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[3][5] | MAIN[1][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[3][4] | MAIN[1][3] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[0][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[0][2] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[4][8] | MAIN[1][8] | MAIN[3][9] | MAIN[4][9] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[4][1] | MAIN[3][1] | MAIN[3][0] | MAIN[4][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[4][6] |
|---|---|
| IO[1].SYNC_D | MAIN[4][2] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_WE_I1[0] | CELL.IMUX_CLB_C1 | CELL.OUT_IO_WE_I1[1] |
| O1 | bidir | CELL.DEC_V[0] | CELL.DEC_V[0] | CELL.DEC_V[0] |
| O2 | bidir | CELL.DEC_V[1] | CELL.DEC_V[1] | CELL.DEC_V[1] |
| O3 | bidir | CELL.DEC_V[2] | CELL.DEC_V[2] | CELL.DEC_V[2] |
| O4 | bidir | CELL.DEC_V[3] | CELL.DEC_V[3] | CELL.DEC_V[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[5][4] | !MAIN[5][6] | MAIN[4][5] |
| O1_N | MAIN[5][3] | MAIN[5][5] | !MAIN[4][4] |
| O2_P | !MAIN[10][4] | !MAIN[8][3] | MAIN[9][4] |
| O2_N | MAIN[10][3] | MAIN[8][4] | !MAIN[9][5] |
| O3_P | !MAIN[6][3] | !MAIN[6][6] | MAIN[7][4] |
| O3_N | MAIN[6][4] | MAIN[6][5] | !MAIN[7][5] |
| O4_P | !MAIN[12][4] | !MAIN[12][5] | MAIN[11][5] |
| O4_N | MAIN[12][3] | MAIN[12][6] | !MAIN[11][4] |
Bels PULLUP
| Pin | Direction | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|---|
| O | bidir | CELL.LONG_H[2] | CELL.LONG_H[3] |
| Attribute | PULLUP_TBUF[0] | PULLUP_TBUF[1] |
|---|---|---|
| ENABLE | !MAIN_S[25][7] | !MAIN[14][7] |
Bel wires
| Wire | Pins |
|---|---|
| CELL.LONG_H[2] | TBUF[0].O, PULLUP_TBUF[0].O |
| CELL.LONG_H[3] | TBUF[1].O, PULLUP_TBUF[1].O |
| CELL.DEC_V[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_V[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_V[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_V[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F1 | IO[1].O2 |
| CELL.IMUX_CLB_G1 | IO[0].O2 |
| CELL.IMUX_CLB_C1 | DEC[1].I |
| CELL.IMUX_TBUF_I[0] | TBUF[0].I |
| CELL.IMUX_TBUF_I[1] | TBUF[1].I |
| CELL.IMUX_TBUF_T[0] | TBUF[0].T |
| CELL.IMUX_TBUF_T[1] | TBUF[1].T |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_WE_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_WE_I1[1] | IO[1].CLKIN, DEC[2].I |
| CELL.OUT_IO_WE_I2[0] | IO[0].I2 |
| CELL.OUT_IO_WE_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | TBUF[0]: ! DRIVE1_DUP | - | - | - | - | - | INT: mux CELL.IMUX_IO_IK[1] bit 0 | - | INT: mux CELL.IMUX_IO_OK[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 1 | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 9 | INT: mux CELL.IMUX_IO_O1[1] bit 3 | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PULLUP_TBUF[0]: ! ENABLE | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_C1 bit 8 | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: mux CELL.IMUX_CLB_G1 bit 8 | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_S0
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_S[0] | CELL.OCTAL_IO_S[8] | !MAIN[2][5] |
| CELL.OCTAL_IO_S[8] | CELL.OCTAL_IO_S[0] | !MAIN[1][5] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[25][5] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[15][9] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[19][13] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[14][9] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[34][12] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[20][13] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[10][9] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[13][9] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[31][12] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[39][11] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[38][11] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[44][11] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[45][11] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.TIE_0 | !MAIN[8][9] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[20][10] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[16][10] |
| CELL.SINGLE_H[2] | CELL.OUT_CLB_XQ_S | !MAIN[15][11] |
| CELL.SINGLE_H[3] | CELL.TIE_0 | !MAIN[12][11] |
| CELL.SINGLE_H[3] | CELL.OUT_CLB_X_S | !MAIN[14][13] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[31][8] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_SN_I2[0] | !MAIN[19][10] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[24][8] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][10] |
| CELL.SINGLE_H[6] | CELL.TIE_0 | !MAIN[14][10] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[30][13] |
| CELL.SINGLE_H[6] | CELL.OUT_CLB_XQ_S | !MAIN[16][11] |
| CELL.SINGLE_H[7] | CELL.TIE_0 | !MAIN[13][13] |
| CELL.SINGLE_H[7] | CELL.OUT_CLB_X_S | !MAIN[15][13] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[42][11] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[28][9] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[36][13] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[30][10] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[37][11] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[43][8] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[44][8] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[22][10] |
| CELL.SINGLE_V[0] | CELL.DEC_H[3] | !MAIN[20][4] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][5] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][4] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][6] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][4] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][4] |
| CELL.SINGLE_V[3] | CELL.DEC_H[2] | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[22][11] |
| CELL.SINGLE_V[4] | CELL.DEC_H[1] | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][6] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[36][9] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][4] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][6] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[36][11] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][4] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][5] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[22][13] |
| CELL.SINGLE_V[7] | CELL.DEC_H[0] | !MAIN[32][4] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][4] |
| CELL.DOUBLE_H0[0] | CELL.OUT_CLB_XQ_S | !MAIN[14][11] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[21][10] |
| CELL.DOUBLE_H1[0] | CELL.OUT_CLB_X_S | !MAIN[16][13] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[17][10] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][3] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][6] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][3] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][6] |
| CELL.DOUBLE_IO_S0[0] | CELL.DBUF_IO_H[1] | !MAIN[11][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DBUF_IO_H[1] | !MAIN[10][2] |
| CELL.DOUBLE_IO_S0[2] | CELL.DBUF_IO_H[1] | !MAIN[10][1] |
| CELL.DOUBLE_IO_S0[3] | CELL.DBUF_IO_H[1] | !MAIN[11][1] |
| CELL.DOUBLE_IO_S1[0] | CELL.GCLK[4] | !MAIN[39][2] |
| CELL.DOUBLE_IO_S1[1] | CELL.LONG_V[8] | !MAIN[44][3] |
| CELL.DOUBLE_IO_S1[2] | CELL.LONG_V[7] | !MAIN[45][0] |
| CELL.DOUBLE_IO_S1[3] | CELL.GCLK[7] | !MAIN[37][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.DBUF_IO_H[0] | !MAIN[36][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.LONG_V[9] | !MAIN[45][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.DBUF_IO_H[0] | !MAIN[35][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.GCLK[5] | !MAIN[38][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.DBUF_IO_H[0] | !MAIN[35][1] |
| CELL.DOUBLE_IO_S2[2] | CELL.GCLK[6] | !MAIN[37][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.DBUF_IO_H[0] | !MAIN[36][1] |
| CELL.DOUBLE_IO_S2[3] | CELL.LONG_V[6] | !MAIN[43][2] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[40][14] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_SN_I2[1] | !MAIN[19][14] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[37][13] |
| CELL.QUAD_H0[1] | CELL.OUT_CLB_X_S | !MAIN[10][14] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[46][14] |
| CELL.QUAD_H0[2] | CELL.OUT_CLB_XQ_S | !MAIN[11][15] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[6][14] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[7][14] |
| CELL.QUAD_H3[1] | CELL.OUT_CLB_XQ_S | !MAIN[12][15] |
| CELL.QUAD_H3[2] | CELL.OUT_CLB_X_S | !MAIN[11][14] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][14] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[39][14] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[39][13] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[45][14] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[41][14] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][6] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[37][14] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][0] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[46][15] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][1] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][5] |
| CELL.QUAD_V3[0] | CELL.DEC_H[2] | !MAIN[41][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][5] |
| CELL.QUAD_V3[1] | CELL.DEC_H[1] | !MAIN[40][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.DEC_H[0] | !MAIN[45][5] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][6] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[38][14] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[38][13] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[44][14] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[24][10] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[23][9] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[26][8] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[26][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[25][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[25][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[28][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[27][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[29][12] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[27][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[24][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[26][11] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[32][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[35][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[31][10] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[31][9] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[32][8] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[33][9] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[31][11] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[32][12] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[32][11] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[34][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[31][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[33][12] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[22][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[24][9] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[43][11] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[26][10] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[27][9] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[41][11] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[27][13] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[28][13] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[37][12] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[28][11] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[29][11] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[45][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[35][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[33][10] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[40][11] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[32][9] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[34][9] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[42][12] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[30][11] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[33][11] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[43][12] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[33][13] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[35][13] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[38][12] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[25][10] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_S0[0] | !MAIN[23][2] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[25][2] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_S[7] | !MAIN[22][7] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[27][8] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_S1[0] | !MAIN[19][1] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_S[6] | !MAIN[23][7] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[26][13] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_S0[1] | !MAIN[28][2] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_S2[1] | !MAIN[27][1] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_S[5] | !MAIN[27][7] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[23][11] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_S1[1] | !MAIN[26][3] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_S[4] | !MAIN[30][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[34][10] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_S0[2] | !MAIN[31][2] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_S2[2] | !MAIN[30][1] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_S[3] | !MAIN[40][7] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[35][9] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_S1[2] | !MAIN[29][2] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_S[2] | !MAIN[36][7] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[34][11] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_S0[3] | !MAIN[33][1] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][2] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_S[1] | !MAIN[37][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[32][13] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][3] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_S[0] | !MAIN[33][7] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[22][14] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[25][14] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[25][15] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[33][15] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[33][14] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[32][14] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[34][14] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[32][15] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[25][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[23][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[24][13] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[29][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[28][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[29][8] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[40][12] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[25][11] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[25][12] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[39][12] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[29][9] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[30][9] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[23][12] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S0[1] | !MAIN[27][2] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S1[1] | !MAIN[25][3] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S2[1] | !MAIN[28][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[30][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S0[2] | !MAIN[29][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S1[2] | !MAIN[30][2] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][1] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S0[0] | !MAIN[22][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S1[0] | !MAIN[21][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[26][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S0[3] | !MAIN[32][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][1] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S2[3] | !MAIN[34][2] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[31][14] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[21][14] |
| CELL.DOUBLE_IO_S0[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[24][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DOUBLE_IO_S2[1] | !MAIN[26][1] |
| CELL.DOUBLE_IO_S0[2] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][3] |
| CELL.DOUBLE_IO_S0[3] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][3] |
| CELL.DOUBLE_IO_S1[0] | CELL.QUAD_V2[0] | !MAIN[41][1] |
| CELL.DOUBLE_IO_S1[1] | CELL.QUAD_V1[1] | !MAIN[42][2] |
| CELL.DOUBLE_IO_S1[2] | CELL.QUAD_V3[1] | !MAIN[40][1] |
| CELL.DOUBLE_IO_S1[3] | CELL.QUAD_V2[2] | !MAIN[38][1] |
| CELL.DOUBLE_IO_S2[0] | CELL.QUAD_V1[0] | !MAIN[41][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.QUAD_V3[0] | !MAIN[46][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.QUAD_V2[1] | !MAIN[39][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.QUAD_V1[2] | !MAIN[39][1] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[38][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[39][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[35][15] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[44][12] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[42][13] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[43][13] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[44][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[45][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[41][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[37][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[36][15] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[45][13] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[46][13] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[43][15] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[42][15] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[34][15] |
| CELL.QUAD_V0[0] | CELL.LONG_IO_H[0] | !MAIN[45][3] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[44][13] |
| CELL.QUAD_V0[1] | CELL.LONG_IO_H[1] | !MAIN[46][4] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[40][15] |
| CELL.QUAD_V0[2] | CELL.LONG_IO_H[3] | !MAIN[45][4] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][2] | MAIN[9][2] | MAIN[8][1] | MAIN[9][1] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][3] | MAIN[35][3] | MAIN[36][3] | MAIN[34][1] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S2[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[35][14] | MAIN[36][14] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][13] | MAIN[41][13] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[42][14] | MAIN[43][14] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][5] | MAIN[28][5] | MAIN[30][5] | MAIN[29][5] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][5] | MAIN[34][5] | MAIN[35][6] | MAIN[35][5] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][5] | MAIN[31][5] | MAIN[33][5] | MAIN[34][6] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][5] | MAIN[7][6] | MAIN[8][6] | MAIN[8][5] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][5] | MAIN[2][6] | MAIN[3][6] | MAIN[3][5] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][5] | MAIN[9][6] | MAIN[10][5] | MAIN[10][6] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][5] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][5] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][6] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][6] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][6] | MAIN[17][4] | MAIN[43][5] | MAIN[44][5] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][3] | MAIN[15][2] | MAIN[19][4] | MAIN[18][1] | MAIN[40][5] | MAIN[38][5] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][3] | MAIN[21][4] | MAIN[22][4] | MAIN[23][4] | MAIN[43][6] | MAIN[44][6] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][5] | MAIN[24][4] | MAIN[39][6] | MAIN[37][6] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][0] | MAIN[43][1] | MAIN[42][1] | MAIN[44][2] | MAIN[44][1] | MAIN[45][1] | MAIN[46][1] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[2] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[3] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[11][13] | MAIN[11][11] | MAIN[12][10] | MAIN[12][12] | MAIN[12][13] | MAIN[13][12] | MAIN[13][11] | MAIN[13][10] | MAIN[15][15] | MAIN[16][14] | MAIN[17][14] | MAIN[16][15] | MAIN[12][14] | MAIN[10][15] | MAIN[17][15] | CELL.IMUX_CLB_F2 |
| Source | |||||||||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][11] | MAIN[10][12] | MAIN[9][10] | MAIN[9][11] | MAIN[11][10] | MAIN[9][13] | MAIN[10][13] | MAIN[11][12] | MAIN[29][15] | MAIN[29][14] | MAIN[30][14] | MAIN[30][15] | MAIN[31][15] | MAIN[14][14] | MAIN[14][15] | CELL.IMUX_CLB_F4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[3][11] | MAIN[4][11] | MAIN[4][13] | MAIN[3][10] | MAIN[4][12] | MAIN[3][12] | MAIN[3][13] | MAIN[4][10] | MAIN[5][12] | MAIN[4][14] | MAIN[4][15] | MAIN[5][14] | MAIN[5][15] | MAIN[9][14] | MAIN[7][15] | MAIN[6][15] | CELL.IMUX_CLB_G2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_COUT0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][13] | MAIN[5][13] | MAIN[7][12] | MAIN[5][10] | MAIN[5][11] | MAIN[6][11] | MAIN[6][12] | MAIN[6][10] | MAIN[23][14] | MAIN[22][15] | MAIN[24][14] | MAIN[23][15] | MAIN[24][15] | MAIN[13][14] | MAIN[9][15] | CELL.IMUX_CLB_G4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[1][11] | MAIN[1][10] | MAIN[2][11] | MAIN[2][13] | MAIN[1][12] | MAIN[1][13] | MAIN[2][10] | MAIN[2][12] | MAIN[1][14] | MAIN[1][15] | MAIN[2][14] | MAIN[2][15] | MAIN[8][14] | MAIN[8][15] | MAIN[3][15] | MAIN[3][14] | CELL.IMUX_CLB_C2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[8][11] | MAIN[9][12] | MAIN[7][11] | MAIN[7][10] | MAIN[8][13] | MAIN[8][12] | MAIN[7][13] | MAIN[8][10] | MAIN[26][15] | MAIN[26][14] | MAIN[27][14] | MAIN[27][15] | MAIN[28][15] | MAIN[28][14] | MAIN[15][14] | MAIN[13][15] | CELL.IMUX_CLB_C4 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][4] | MAIN[29][4] | MAIN[37][4] | MAIN[39][3] | MAIN[38][3] | MAIN[37][3] | MAIN[40][4] | MAIN[27][3] | MAIN[30][3] | MAIN[28][3] | MAIN[29][3] | MAIN[28][4] | MAIN[39][4] | MAIN[38][4] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[40][3] | MAIN_E[41][4] | MAIN[3][4] | MAIN[1][4] | MAIN[4][5] | MAIN[3][3] | MAIN[2][4] | MAIN[2][3] | MAIN_E[41][3] | MAIN_E[42][3] | MAIN_E[43][3] | MAIN_E[43][4] | MAIN[1][3] | MAIN_E[42][4] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][5] | MAIN[24][6] | MAIN[25][6] | MAIN[26][6] | MAIN[27][6] | MAIN[29][6] | MAIN[30][6] | MAIN[28][6] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][6] | MAIN[12][6] | MAIN[11][5] | MAIN[13][5] | MAIN[12][5] | MAIN[14][5] | MAIN[14][6] | MAIN[13][6] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][5] | MAIN[20][5] | MAIN[21][5] | MAIN[22][5] | MAIN[19][6] | MAIN[20][6] | MAIN[22][6] | MAIN[21][6] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][6] | MAIN[17][6] | MAIN[15][5] | MAIN[16][5] | MAIN[17][5] | MAIN[18][5] | MAIN[18][6] | MAIN[16][6] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][2] | MAIN[4][2] | MAIN[7][0] | MAIN[7][1] | MAIN[7][2] | MAIN[5][2] | MAIN[6][1] | MAIN[5][1] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[1][1] | MAIN[2][2] | MAIN[12][2] | MAIN[3][1] | MAIN[3][2] | MAIN[4][1] | MAIN[2][1] | MAIN[1][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[38][8] | MAIN[41][8] | MAIN[40][8] | MAIN[39][8] | CELL.IMUX_CIN |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][0] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][0] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][0] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F4 | CELL.IMUX_CLB_G4 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][0] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][0] | !MAIN[13][0] |
| OFF_SRVAL bit 0 | !MAIN[25][1] | !MAIN[12][1] |
| READBACK_I1 bit 0 | !MAIN[19][3] | !MAIN[18][2] |
| READBACK_I2 bit 0 | !MAIN[19][2] | !MAIN[18][3] |
| READBACK_OQ bit 0 | !MAIN[17][3] | !MAIN[17][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][0] | !MAIN[10][0] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][0] | MAIN[11][0] |
| IFF_CE_ENABLE | !MAIN[20][1] | !MAIN[14][2] |
| OFF_CE_ENABLE | !MAIN[31][0] | !MAIN[13][2] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][0] | !MAIN[40][0] |
| IO[0].SLEW | MAIN[34][0] |
|---|---|
| IO[1].SLEW | MAIN[2][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][1] | MAIN[24][1] |
|---|---|---|
| IO[1].PULL | MAIN[14][1] | MAIN[13][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][0] | MAIN[18][0] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][0] | MAIN[16][1] |
| IO[0].MUX_I2 | MAIN[22][0] | MAIN[21][0] |
| IO[1].MUX_I2 | MAIN[16][0] | MAIN[15][0] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][0] | MAIN[21][1] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][1] | MAIN[15][1] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][0] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][0] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][0] | MAIN[28][0] | MAIN[30][0] | MAIN[32][0] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][0] | MAIN[4][0] | MAIN[8][0] | MAIN[6][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][1] |
|---|---|
| IO[1].SYNC_D | MAIN[12][0] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C4 | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[15][3] | !MAIN[13][4] | MAIN[14][3] |
| O1_N | MAIN[15][4] | MAIN[13][3] | !MAIN[14][4] |
| O2_P | !MAIN[10][3] | !MAIN[12][4] | MAIN[11][3] |
| O2_N | MAIN[10][4] | MAIN[12][3] | !MAIN[11][4] |
| O3_P | !MAIN[4][3] | !MAIN[6][4] | MAIN[5][3] |
| O3_N | MAIN[4][4] | MAIN[6][3] | !MAIN[5][4] |
| O4_P | !MAIN[9][3] | !MAIN[7][4] | MAIN[8][3] |
| O4_N | MAIN[9][4] | MAIN[7][3] | !MAIN[8][4] |
Bels CIN
| Pin | Direction | CIN |
|---|---|---|
| I | in | CELL.IMUX_CIN |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F4 | IO[0].O2 |
| CELL.IMUX_CLB_G4 | IO[1].O2 |
| CELL.IMUX_CLB_C4 | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.IMUX_CIN | CIN.I |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_S0_E
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_S[0] | CELL.OCTAL_IO_S[8] | !MAIN[2][5] |
| CELL.OCTAL_IO_S[8] | CELL.OCTAL_IO_S[0] | !MAIN[1][5] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[25][5] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[15][9] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[19][13] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[14][9] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[34][12] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[20][13] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[10][9] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[13][9] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[31][12] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[39][11] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[38][11] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[44][11] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[45][11] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.TIE_0 | !MAIN[8][9] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[20][10] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[16][10] |
| CELL.SINGLE_H[2] | CELL.OUT_CLB_XQ_S | !MAIN[15][11] |
| CELL.SINGLE_H[3] | CELL.TIE_0 | !MAIN[12][11] |
| CELL.SINGLE_H[3] | CELL.OUT_CLB_X_S | !MAIN[14][13] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[31][8] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_SN_I2[0] | !MAIN[19][10] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[24][8] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][10] |
| CELL.SINGLE_H[6] | CELL.TIE_0 | !MAIN[14][10] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[30][13] |
| CELL.SINGLE_H[6] | CELL.OUT_CLB_XQ_S | !MAIN[16][11] |
| CELL.SINGLE_H[7] | CELL.TIE_0 | !MAIN[13][13] |
| CELL.SINGLE_H[7] | CELL.OUT_CLB_X_S | !MAIN[15][13] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[42][11] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[28][9] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[36][13] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[30][10] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[37][11] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[43][8] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[44][8] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[22][10] |
| CELL.SINGLE_V[0] | CELL.DEC_H[3] | !MAIN[20][4] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][5] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][4] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][6] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][4] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][4] |
| CELL.SINGLE_V[3] | CELL.DEC_H[2] | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[22][11] |
| CELL.SINGLE_V[4] | CELL.DEC_H[1] | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][6] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[36][9] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][4] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][6] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[36][11] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][4] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][5] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[22][13] |
| CELL.SINGLE_V[7] | CELL.DEC_H[0] | !MAIN[32][4] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][4] |
| CELL.DOUBLE_H0[0] | CELL.OUT_CLB_XQ_S | !MAIN[14][11] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[21][10] |
| CELL.DOUBLE_H1[0] | CELL.OUT_CLB_X_S | !MAIN[16][13] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[17][10] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][3] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][6] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][3] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][6] |
| CELL.DOUBLE_IO_S0[0] | CELL.DBUF_IO_H[1] | !MAIN[11][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DBUF_IO_H[1] | !MAIN[10][2] |
| CELL.DOUBLE_IO_S0[2] | CELL.DBUF_IO_H[1] | !MAIN[10][1] |
| CELL.DOUBLE_IO_S0[3] | CELL.DBUF_IO_H[1] | !MAIN[11][1] |
| CELL.DOUBLE_IO_S1[0] | CELL.GCLK[4] | !MAIN[39][2] |
| CELL.DOUBLE_IO_S1[1] | CELL.LONG_V[8] | !MAIN[44][3] |
| CELL.DOUBLE_IO_S1[2] | CELL.LONG_V[7] | !MAIN[45][0] |
| CELL.DOUBLE_IO_S1[3] | CELL.GCLK[7] | !MAIN[37][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.DBUF_IO_H[0] | !MAIN[36][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.LONG_V[9] | !MAIN[45][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.DBUF_IO_H[0] | !MAIN[35][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.GCLK[5] | !MAIN[38][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.DBUF_IO_H[0] | !MAIN[35][1] |
| CELL.DOUBLE_IO_S2[2] | CELL.GCLK[6] | !MAIN[37][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.DBUF_IO_H[0] | !MAIN[36][1] |
| CELL.DOUBLE_IO_S2[3] | CELL.LONG_V[6] | !MAIN[43][2] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[40][14] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_SN_I2[1] | !MAIN[19][14] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[37][13] |
| CELL.QUAD_H0[1] | CELL.OUT_CLB_X_S | !MAIN[10][14] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[46][14] |
| CELL.QUAD_H0[2] | CELL.OUT_CLB_XQ_S | !MAIN[11][15] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[6][14] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[7][14] |
| CELL.QUAD_H3[1] | CELL.OUT_CLB_XQ_S | !MAIN[12][15] |
| CELL.QUAD_H3[2] | CELL.OUT_CLB_X_S | !MAIN[11][14] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][14] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[39][14] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[39][13] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[45][14] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[41][14] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][6] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[37][14] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][0] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[46][15] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][1] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][5] |
| CELL.QUAD_V3[0] | CELL.DEC_H[2] | !MAIN[41][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][5] |
| CELL.QUAD_V3[1] | CELL.DEC_H[1] | !MAIN[40][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.DEC_H[0] | !MAIN[45][5] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][6] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[38][14] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[38][13] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[44][14] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[24][10] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[23][9] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[26][8] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[26][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[25][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[25][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[28][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[27][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[29][12] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[27][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[24][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[26][11] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[32][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[35][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[31][10] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[31][9] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[32][8] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[33][9] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[31][11] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[32][12] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[32][11] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[34][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[31][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[33][12] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[22][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[24][9] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[43][11] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[26][10] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[27][9] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[41][11] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[27][13] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[28][13] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[37][12] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[28][11] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[29][11] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[45][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[35][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[33][10] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[40][11] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[32][9] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[34][9] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[42][12] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[30][11] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[33][11] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[43][12] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[33][13] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[35][13] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[38][12] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[25][10] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_S0[0] | !MAIN[23][2] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[25][2] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_S[7] | !MAIN[22][7] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[27][8] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_S1[0] | !MAIN[19][1] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_S[6] | !MAIN[23][7] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[26][13] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_S0[1] | !MAIN[28][2] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_S2[1] | !MAIN[27][1] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_S[5] | !MAIN[27][7] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[23][11] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_S1[1] | !MAIN[26][3] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_S[4] | !MAIN[30][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[34][10] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_S0[2] | !MAIN[31][2] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_S2[2] | !MAIN[30][1] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_S[3] | !MAIN[40][7] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[35][9] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_S1[2] | !MAIN[29][2] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_S[2] | !MAIN[36][7] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[34][11] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_S0[3] | !MAIN[33][1] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][2] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_S[1] | !MAIN[37][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[32][13] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][3] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_S[0] | !MAIN[33][7] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[22][14] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[25][14] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[25][15] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[33][15] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[33][14] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[32][14] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[34][14] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[32][15] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[25][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[23][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[24][13] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[29][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[28][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[29][8] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[40][12] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[25][11] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[25][12] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[39][12] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[29][9] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[30][9] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[23][12] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S0[1] | !MAIN[27][2] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S1[1] | !MAIN[25][3] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S2[1] | !MAIN[28][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[30][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S0[2] | !MAIN[29][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S1[2] | !MAIN[30][2] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][1] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S0[0] | !MAIN[22][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S1[0] | !MAIN[21][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[26][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S0[3] | !MAIN[32][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][1] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S2[3] | !MAIN[34][2] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[31][14] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[21][14] |
| CELL.DOUBLE_IO_S0[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[24][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DOUBLE_IO_S2[1] | !MAIN[26][1] |
| CELL.DOUBLE_IO_S0[2] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][3] |
| CELL.DOUBLE_IO_S0[3] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][3] |
| CELL.DOUBLE_IO_S1[0] | CELL.QUAD_V2[0] | !MAIN[41][1] |
| CELL.DOUBLE_IO_S1[1] | CELL.QUAD_V1[1] | !MAIN[42][2] |
| CELL.DOUBLE_IO_S1[2] | CELL.QUAD_V3[1] | !MAIN[40][1] |
| CELL.DOUBLE_IO_S1[3] | CELL.QUAD_V2[2] | !MAIN[38][1] |
| CELL.DOUBLE_IO_S2[0] | CELL.QUAD_V1[0] | !MAIN[41][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.QUAD_V3[0] | !MAIN[46][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.QUAD_V2[1] | !MAIN[39][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.QUAD_V1[2] | !MAIN[39][1] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[38][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[39][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[35][15] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[44][12] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[42][13] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[43][13] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[44][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[45][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[41][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[37][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[36][15] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[45][13] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[46][13] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[43][15] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[42][15] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[34][15] |
| CELL.QUAD_V0[0] | CELL.LONG_IO_H[0] | !MAIN[45][3] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[44][13] |
| CELL.QUAD_V0[1] | CELL.LONG_IO_H[1] | !MAIN[46][4] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[40][15] |
| CELL.QUAD_V0[2] | CELL.LONG_IO_H[3] | !MAIN[45][4] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][2] | MAIN[9][2] | MAIN[8][1] | MAIN[9][1] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][3] | MAIN[35][3] | MAIN[36][3] | MAIN[34][1] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S2[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[35][14] | MAIN[36][14] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][13] | MAIN[41][13] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[42][14] | MAIN[43][14] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][5] | MAIN[28][5] | MAIN[30][5] | MAIN[29][5] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][5] | MAIN[34][5] | MAIN[35][6] | MAIN[35][5] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][5] | MAIN[31][5] | MAIN[33][5] | MAIN[34][6] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][5] | MAIN[7][6] | MAIN[8][6] | MAIN[8][5] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][5] | MAIN[2][6] | MAIN[3][6] | MAIN[3][5] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][5] | MAIN[9][6] | MAIN[10][5] | MAIN[10][6] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][5] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][5] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][6] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][6] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][6] | MAIN[17][4] | MAIN[43][5] | MAIN[44][5] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][3] | MAIN[15][2] | MAIN[19][4] | MAIN[18][1] | MAIN[40][5] | MAIN[38][5] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][3] | MAIN[21][4] | MAIN[22][4] | MAIN[23][4] | MAIN[43][6] | MAIN[44][6] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][5] | MAIN[24][4] | MAIN[39][6] | MAIN[37][6] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][0] | MAIN[43][1] | MAIN[42][1] | MAIN[44][2] | MAIN[44][1] | MAIN[45][1] | MAIN[46][1] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[2] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[3] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[11][13] | MAIN[11][11] | MAIN[12][10] | MAIN[12][12] | MAIN[12][13] | MAIN[13][12] | MAIN[13][11] | MAIN[13][10] | MAIN[15][15] | MAIN[16][14] | MAIN[17][14] | MAIN[16][15] | MAIN[12][14] | MAIN[10][15] | MAIN[17][15] | CELL.IMUX_CLB_F2 |
| Source | |||||||||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][11] | MAIN[10][12] | MAIN[9][10] | MAIN[9][11] | MAIN[11][10] | MAIN[9][13] | MAIN[10][13] | MAIN[11][12] | MAIN[29][15] | MAIN[29][14] | MAIN[30][14] | MAIN[30][15] | MAIN[31][15] | MAIN[14][14] | MAIN[14][15] | CELL.IMUX_CLB_F4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[3][11] | MAIN[4][11] | MAIN[4][13] | MAIN[3][10] | MAIN[4][12] | MAIN[3][12] | MAIN[3][13] | MAIN[4][10] | MAIN[5][12] | MAIN[4][14] | MAIN[4][15] | MAIN[5][14] | MAIN[5][15] | MAIN[9][14] | MAIN[7][15] | MAIN[6][15] | CELL.IMUX_CLB_G2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_COUT0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][13] | MAIN[5][13] | MAIN[7][12] | MAIN[5][10] | MAIN[5][11] | MAIN[6][11] | MAIN[6][12] | MAIN[6][10] | MAIN[23][14] | MAIN[22][15] | MAIN[24][14] | MAIN[23][15] | MAIN[24][15] | MAIN[13][14] | MAIN[9][15] | CELL.IMUX_CLB_G4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[1][11] | MAIN[1][10] | MAIN[2][11] | MAIN[2][13] | MAIN[1][12] | MAIN[1][13] | MAIN[2][10] | MAIN[2][12] | MAIN[1][14] | MAIN[1][15] | MAIN[2][14] | MAIN[2][15] | MAIN[8][14] | MAIN[8][15] | MAIN[3][15] | MAIN[3][14] | CELL.IMUX_CLB_C2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[8][11] | MAIN[9][12] | MAIN[7][11] | MAIN[7][10] | MAIN[8][13] | MAIN[8][12] | MAIN[7][13] | MAIN[8][10] | MAIN[26][15] | MAIN[26][14] | MAIN[27][14] | MAIN[27][15] | MAIN[28][15] | MAIN[28][14] | MAIN[15][14] | MAIN[13][15] | CELL.IMUX_CLB_C4 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][4] | MAIN[29][4] | MAIN[37][4] | MAIN[39][3] | MAIN[38][3] | MAIN[37][3] | MAIN[40][4] | MAIN[27][3] | MAIN[30][3] | MAIN[28][3] | MAIN[29][3] | MAIN[28][4] | MAIN[39][4] | MAIN[38][4] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[45][3] | MAIN_E[46][4] | MAIN[3][4] | MAIN[1][4] | MAIN[4][5] | MAIN[3][3] | MAIN[2][4] | MAIN[2][3] | MAIN_E[46][3] | MAIN_E[47][3] | MAIN_E[48][3] | MAIN_E[48][4] | MAIN[1][3] | MAIN_E[47][4] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][5] | MAIN[24][6] | MAIN[25][6] | MAIN[26][6] | MAIN[27][6] | MAIN[29][6] | MAIN[30][6] | MAIN[28][6] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][6] | MAIN[12][6] | MAIN[11][5] | MAIN[13][5] | MAIN[12][5] | MAIN[14][5] | MAIN[14][6] | MAIN[13][6] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][5] | MAIN[20][5] | MAIN[21][5] | MAIN[22][5] | MAIN[19][6] | MAIN[20][6] | MAIN[22][6] | MAIN[21][6] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][6] | MAIN[17][6] | MAIN[15][5] | MAIN[16][5] | MAIN[17][5] | MAIN[18][5] | MAIN[18][6] | MAIN[16][6] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][2] | MAIN[4][2] | MAIN[7][0] | MAIN[7][1] | MAIN[7][2] | MAIN[5][2] | MAIN[6][1] | MAIN[5][1] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[1][1] | MAIN[2][2] | MAIN[12][2] | MAIN[3][1] | MAIN[3][2] | MAIN[4][1] | MAIN[2][1] | MAIN[1][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[38][8] | MAIN[41][8] | MAIN[40][8] | MAIN[39][8] | CELL.IMUX_CIN |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][0] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][0] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][0] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F4 | CELL.IMUX_CLB_G4 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][0] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| CLKIN | out | - | CELL.OUT_IO_CLKIN |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][0] | !MAIN[13][0] |
| OFF_SRVAL bit 0 | !MAIN[25][1] | !MAIN[12][1] |
| READBACK_I1 bit 0 | !MAIN[19][3] | !MAIN[18][2] |
| READBACK_I2 bit 0 | !MAIN[19][2] | !MAIN[18][3] |
| READBACK_OQ bit 0 | !MAIN[17][3] | !MAIN[17][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][0] | !MAIN[10][0] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][0] | MAIN[11][0] |
| IFF_CE_ENABLE | !MAIN[20][1] | !MAIN[14][2] |
| OFF_CE_ENABLE | !MAIN[31][0] | !MAIN[13][2] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][0] | !MAIN[40][0] |
| IO[0].SLEW | MAIN[34][0] |
|---|---|
| IO[1].SLEW | MAIN[2][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][1] | MAIN[24][1] |
|---|---|---|
| IO[1].PULL | MAIN[14][1] | MAIN[13][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][0] | MAIN[18][0] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][0] | MAIN[16][1] |
| IO[0].MUX_I2 | MAIN[22][0] | MAIN[21][0] |
| IO[1].MUX_I2 | MAIN[16][0] | MAIN[15][0] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][0] | MAIN[21][1] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][1] | MAIN[15][1] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][0] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][0] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][0] | MAIN[28][0] | MAIN[30][0] | MAIN[32][0] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][0] | MAIN[4][0] | MAIN[8][0] | MAIN[6][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][1] |
|---|---|
| IO[1].SYNC_D | MAIN[12][0] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C4 | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[15][3] | !MAIN[13][4] | MAIN[14][3] |
| O1_N | MAIN[15][4] | MAIN[13][3] | !MAIN[14][4] |
| O2_P | !MAIN[10][3] | !MAIN[12][4] | MAIN[11][3] |
| O2_N | MAIN[10][4] | MAIN[12][3] | !MAIN[11][4] |
| O3_P | !MAIN[4][3] | !MAIN[6][4] | MAIN[5][3] |
| O3_N | MAIN[4][4] | MAIN[6][3] | !MAIN[5][4] |
| O4_P | !MAIN[9][3] | !MAIN[7][4] | MAIN[8][3] |
| O4_N | MAIN[9][4] | MAIN[7][3] | !MAIN[8][4] |
Bels CIN
| Pin | Direction | CIN |
|---|---|---|
| I | in | CELL.IMUX_CIN |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F4 | IO[0].O2 |
| CELL.IMUX_CLB_G4 | IO[1].O2 |
| CELL.IMUX_CLB_C4 | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.IMUX_CIN | CIN.I |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[1].CLKIN |
Bitstream
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_S1
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_S[0] | CELL.OCTAL_IO_S[8] | !MAIN[2][5] |
| CELL.OCTAL_IO_S[8] | CELL.OCTAL_IO_S[0] | !MAIN[1][5] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[25][5] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[15][9] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[19][13] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[14][9] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[34][12] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[20][13] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[10][9] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[13][9] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[31][12] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[39][11] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[38][11] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[44][11] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[45][11] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.TIE_0 | !MAIN[8][9] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[20][10] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[16][10] |
| CELL.SINGLE_H[2] | CELL.OUT_CLB_XQ_S | !MAIN[15][11] |
| CELL.SINGLE_H[3] | CELL.TIE_0 | !MAIN[12][11] |
| CELL.SINGLE_H[3] | CELL.OUT_CLB_X_S | !MAIN[14][13] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[31][8] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_SN_I2[0] | !MAIN[19][10] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[24][8] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][10] |
| CELL.SINGLE_H[6] | CELL.TIE_0 | !MAIN[14][10] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[30][13] |
| CELL.SINGLE_H[6] | CELL.OUT_CLB_XQ_S | !MAIN[16][11] |
| CELL.SINGLE_H[7] | CELL.TIE_0 | !MAIN[13][13] |
| CELL.SINGLE_H[7] | CELL.OUT_CLB_X_S | !MAIN[15][13] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[42][11] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[28][9] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[36][13] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[30][10] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[37][11] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[43][8] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[44][8] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[22][10] |
| CELL.SINGLE_V[0] | CELL.DEC_H[3] | !MAIN[20][4] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][5] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][4] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][6] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][4] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][4] |
| CELL.SINGLE_V[3] | CELL.DEC_H[2] | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[22][11] |
| CELL.SINGLE_V[4] | CELL.DEC_H[1] | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][6] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[36][9] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][4] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][6] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[36][11] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][4] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][5] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[22][13] |
| CELL.SINGLE_V[7] | CELL.DEC_H[0] | !MAIN[32][4] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][4] |
| CELL.DOUBLE_H0[0] | CELL.OUT_CLB_XQ_S | !MAIN[14][11] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[21][10] |
| CELL.DOUBLE_H1[0] | CELL.OUT_CLB_X_S | !MAIN[16][13] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[17][10] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][3] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][6] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][3] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][6] |
| CELL.DOUBLE_IO_S0[0] | CELL.DBUF_IO_H[1] | !MAIN[11][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DBUF_IO_H[1] | !MAIN[10][2] |
| CELL.DOUBLE_IO_S0[2] | CELL.DBUF_IO_H[1] | !MAIN[10][1] |
| CELL.DOUBLE_IO_S0[3] | CELL.DBUF_IO_H[1] | !MAIN[11][1] |
| CELL.DOUBLE_IO_S1[0] | CELL.GCLK[4] | !MAIN[39][2] |
| CELL.DOUBLE_IO_S1[1] | CELL.LONG_V[8] | !MAIN[44][3] |
| CELL.DOUBLE_IO_S1[2] | CELL.LONG_V[7] | !MAIN[45][0] |
| CELL.DOUBLE_IO_S1[3] | CELL.GCLK[7] | !MAIN[37][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.DBUF_IO_H[0] | !MAIN[36][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.LONG_V[9] | !MAIN[45][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.DBUF_IO_H[0] | !MAIN[35][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.GCLK[5] | !MAIN[38][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.DBUF_IO_H[0] | !MAIN[35][1] |
| CELL.DOUBLE_IO_S2[2] | CELL.GCLK[6] | !MAIN[37][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.DBUF_IO_H[0] | !MAIN[36][1] |
| CELL.DOUBLE_IO_S2[3] | CELL.LONG_V[6] | !MAIN[43][2] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[40][14] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_SN_I2[1] | !MAIN[19][14] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[37][13] |
| CELL.QUAD_H0[1] | CELL.OUT_CLB_X_S | !MAIN[10][14] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[46][14] |
| CELL.QUAD_H0[2] | CELL.OUT_CLB_XQ_S | !MAIN[11][15] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[6][14] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[7][14] |
| CELL.QUAD_H3[1] | CELL.OUT_CLB_XQ_S | !MAIN[12][15] |
| CELL.QUAD_H3[2] | CELL.OUT_CLB_X_S | !MAIN[11][14] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][14] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[39][14] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[39][13] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[45][14] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[41][14] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][6] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[37][14] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][0] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[46][15] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][1] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][5] |
| CELL.QUAD_V3[0] | CELL.DEC_H[2] | !MAIN[41][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][5] |
| CELL.QUAD_V3[1] | CELL.DEC_H[1] | !MAIN[40][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.DEC_H[0] | !MAIN[45][5] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][6] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[38][14] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[38][13] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[44][14] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[24][10] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[23][9] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[26][8] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[26][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[25][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[25][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[28][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[27][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[29][12] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[27][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[24][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[26][11] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[32][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[35][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[31][10] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[31][9] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[32][8] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[33][9] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[31][11] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[32][12] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[32][11] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[34][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[31][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[33][12] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[22][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[24][9] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[43][11] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[26][10] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[27][9] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[41][11] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[27][13] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[28][13] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[37][12] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[28][11] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[29][11] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[45][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[35][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[33][10] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[40][11] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[32][9] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[34][9] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[42][12] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[30][11] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[33][11] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[43][12] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[33][13] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[35][13] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[38][12] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[25][10] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_S1[0] | !MAIN[19][1] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_S[7] | !MAIN[22][7] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[27][8] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_S0[0] | !MAIN[23][2] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_S2[0] | !MAIN[25][2] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_S[6] | !MAIN[23][7] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[26][13] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_S1[1] | !MAIN[26][3] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_S[5] | !MAIN[27][7] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[23][11] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_S0[1] | !MAIN[28][2] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_S2[1] | !MAIN[27][1] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_S[4] | !MAIN[30][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[34][10] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_S1[2] | !MAIN[29][2] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_S[3] | !MAIN[40][7] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[35][9] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_S0[2] | !MAIN[31][2] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_S2[2] | !MAIN[30][1] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_S[2] | !MAIN[36][7] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[34][11] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][3] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_S[1] | !MAIN[37][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[32][13] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_S0[3] | !MAIN[33][1] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][2] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_S[0] | !MAIN[33][7] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[22][14] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[25][14] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[25][15] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[33][15] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[33][14] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[32][14] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[34][14] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[32][15] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[25][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[23][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[24][13] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[29][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[28][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[29][8] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[40][12] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[25][11] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[25][12] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[39][12] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[29][9] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[30][9] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[23][12] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S0[1] | !MAIN[27][2] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S1[1] | !MAIN[25][3] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S2[1] | !MAIN[28][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[30][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S0[2] | !MAIN[29][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S1[2] | !MAIN[30][2] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][1] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S0[0] | !MAIN[22][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S1[0] | !MAIN[21][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[26][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S0[3] | !MAIN[32][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][1] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S2[3] | !MAIN[34][2] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[31][14] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[21][14] |
| CELL.DOUBLE_IO_S0[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[24][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DOUBLE_IO_S2[1] | !MAIN[26][1] |
| CELL.DOUBLE_IO_S0[2] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][3] |
| CELL.DOUBLE_IO_S0[3] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][3] |
| CELL.DOUBLE_IO_S1[0] | CELL.QUAD_V2[0] | !MAIN[41][1] |
| CELL.DOUBLE_IO_S1[1] | CELL.QUAD_V1[1] | !MAIN[42][2] |
| CELL.DOUBLE_IO_S1[2] | CELL.QUAD_V3[1] | !MAIN[40][1] |
| CELL.DOUBLE_IO_S1[3] | CELL.QUAD_V2[2] | !MAIN[38][1] |
| CELL.DOUBLE_IO_S2[0] | CELL.QUAD_V1[0] | !MAIN[41][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.QUAD_V3[0] | !MAIN[46][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.QUAD_V2[1] | !MAIN[39][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.QUAD_V1[2] | !MAIN[39][1] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[38][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[39][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[35][15] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[44][12] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[42][13] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[43][13] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[44][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[45][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[41][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[37][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[36][15] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[45][13] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[46][13] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[43][15] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[42][15] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[34][15] |
| CELL.QUAD_V0[0] | CELL.LONG_IO_H[0] | !MAIN[45][3] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[44][13] |
| CELL.QUAD_V0[1] | CELL.LONG_IO_H[1] | !MAIN[46][4] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[40][15] |
| CELL.QUAD_V0[2] | CELL.LONG_IO_H[3] | !MAIN[45][4] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][2] | MAIN[9][2] | MAIN[8][1] | MAIN[9][1] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][3] | MAIN[35][3] | MAIN[36][3] | MAIN[34][1] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S2[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[35][14] | MAIN[36][14] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][13] | MAIN[41][13] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[42][14] | MAIN[43][14] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][5] | MAIN[28][5] | MAIN[30][5] | MAIN[29][5] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][5] | MAIN[34][5] | MAIN[35][6] | MAIN[35][5] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][5] | MAIN[31][5] | MAIN[33][5] | MAIN[34][6] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][5] | MAIN[7][6] | MAIN[8][6] | MAIN[8][5] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][5] | MAIN[2][6] | MAIN[3][6] | MAIN[3][5] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][5] | MAIN[9][6] | MAIN[10][5] | MAIN[10][6] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][5] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][5] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][6] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][6] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][6] | MAIN[17][4] | MAIN[43][5] | MAIN[44][5] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][3] | MAIN[15][2] | MAIN[19][4] | MAIN[18][1] | MAIN[40][5] | MAIN[38][5] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][3] | MAIN[21][4] | MAIN[22][4] | MAIN[23][4] | MAIN[43][6] | MAIN[44][6] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][5] | MAIN[24][4] | MAIN[39][6] | MAIN[37][6] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][0] | MAIN[43][1] | MAIN[42][1] | MAIN[44][2] | MAIN[44][1] | MAIN[45][1] | MAIN[46][1] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[2] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[3] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[11][13] | MAIN[11][11] | MAIN[12][10] | MAIN[12][12] | MAIN[12][13] | MAIN[13][12] | MAIN[13][11] | MAIN[13][10] | MAIN[15][15] | MAIN[16][14] | MAIN[17][14] | MAIN[16][15] | MAIN[12][14] | MAIN[10][15] | MAIN[17][15] | CELL.IMUX_CLB_F2 |
| Source | |||||||||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][11] | MAIN[10][12] | MAIN[9][10] | MAIN[9][11] | MAIN[11][10] | MAIN[9][13] | MAIN[10][13] | MAIN[11][12] | MAIN[29][15] | MAIN[29][14] | MAIN[30][14] | MAIN[30][15] | MAIN[31][15] | MAIN[14][14] | MAIN[14][15] | CELL.IMUX_CLB_F4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[3][11] | MAIN[4][11] | MAIN[4][13] | MAIN[3][10] | MAIN[4][12] | MAIN[3][12] | MAIN[3][13] | MAIN[4][10] | MAIN[5][12] | MAIN[4][14] | MAIN[4][15] | MAIN[5][14] | MAIN[5][15] | MAIN[9][14] | MAIN[7][15] | MAIN[6][15] | CELL.IMUX_CLB_G2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_COUT0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][13] | MAIN[5][13] | MAIN[7][12] | MAIN[5][10] | MAIN[5][11] | MAIN[6][11] | MAIN[6][12] | MAIN[6][10] | MAIN[23][14] | MAIN[22][15] | MAIN[24][14] | MAIN[23][15] | MAIN[24][15] | MAIN[13][14] | MAIN[9][15] | CELL.IMUX_CLB_G4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[1][11] | MAIN[1][10] | MAIN[2][11] | MAIN[2][13] | MAIN[1][12] | MAIN[1][13] | MAIN[2][10] | MAIN[2][12] | MAIN[1][14] | MAIN[1][15] | MAIN[2][14] | MAIN[2][15] | MAIN[8][14] | MAIN[8][15] | MAIN[3][15] | MAIN[3][14] | CELL.IMUX_CLB_C2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[8][11] | MAIN[9][12] | MAIN[7][11] | MAIN[7][10] | MAIN[8][13] | MAIN[8][12] | MAIN[7][13] | MAIN[8][10] | MAIN[26][15] | MAIN[26][14] | MAIN[27][14] | MAIN[27][15] | MAIN[28][15] | MAIN[28][14] | MAIN[15][14] | MAIN[13][15] | CELL.IMUX_CLB_C4 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][4] | MAIN[29][4] | MAIN[37][4] | MAIN[39][3] | MAIN[38][3] | MAIN[37][3] | MAIN[40][4] | MAIN[27][3] | MAIN[30][3] | MAIN[28][3] | MAIN[29][3] | MAIN[28][4] | MAIN[39][4] | MAIN[38][4] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[40][3] | MAIN_E[41][4] | MAIN[3][4] | MAIN[1][4] | MAIN[4][5] | MAIN[3][3] | MAIN[2][4] | MAIN[2][3] | MAIN_E[41][3] | MAIN_E[42][3] | MAIN_E[43][3] | MAIN_E[43][4] | MAIN[1][3] | MAIN_E[42][4] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][5] | MAIN[24][6] | MAIN[25][6] | MAIN[26][6] | MAIN[27][6] | MAIN[29][6] | MAIN[30][6] | MAIN[28][6] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][6] | MAIN[12][6] | MAIN[11][5] | MAIN[13][5] | MAIN[12][5] | MAIN[14][5] | MAIN[14][6] | MAIN[13][6] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][5] | MAIN[20][5] | MAIN[21][5] | MAIN[22][5] | MAIN[19][6] | MAIN[20][6] | MAIN[22][6] | MAIN[21][6] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][6] | MAIN[17][6] | MAIN[15][5] | MAIN[16][5] | MAIN[17][5] | MAIN[18][5] | MAIN[18][6] | MAIN[16][6] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][2] | MAIN[4][2] | MAIN[7][0] | MAIN[7][1] | MAIN[7][2] | MAIN[5][2] | MAIN[6][1] | MAIN[5][1] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[1][1] | MAIN[2][2] | MAIN[12][2] | MAIN[3][1] | MAIN[3][2] | MAIN[4][1] | MAIN[2][1] | MAIN[1][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[38][8] | MAIN[41][8] | MAIN[40][8] | MAIN[39][8] | CELL.IMUX_CIN |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][0] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][0] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][0] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F4 | CELL.IMUX_CLB_G4 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][0] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][0] | !MAIN[13][0] |
| OFF_SRVAL bit 0 | !MAIN[25][1] | !MAIN[12][1] |
| READBACK_I1 bit 0 | !MAIN[19][3] | !MAIN[18][2] |
| READBACK_I2 bit 0 | !MAIN[19][2] | !MAIN[18][3] |
| READBACK_OQ bit 0 | !MAIN[17][3] | !MAIN[17][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][0] | !MAIN[10][0] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][0] | MAIN[11][0] |
| IFF_CE_ENABLE | !MAIN[20][1] | !MAIN[14][2] |
| OFF_CE_ENABLE | !MAIN[31][0] | !MAIN[13][2] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][0] | !MAIN[40][0] |
| IO[0].SLEW | MAIN[34][0] |
|---|---|
| IO[1].SLEW | MAIN[2][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][1] | MAIN[24][1] |
|---|---|---|
| IO[1].PULL | MAIN[14][1] | MAIN[13][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][0] | MAIN[18][0] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][0] | MAIN[16][1] |
| IO[0].MUX_I2 | MAIN[22][0] | MAIN[21][0] |
| IO[1].MUX_I2 | MAIN[16][0] | MAIN[15][0] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][0] | MAIN[21][1] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][1] | MAIN[15][1] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][0] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][0] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][0] | MAIN[28][0] | MAIN[30][0] | MAIN[32][0] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][0] | MAIN[4][0] | MAIN[8][0] | MAIN[6][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][1] |
|---|---|
| IO[1].SYNC_D | MAIN[12][0] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C4 | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[15][3] | !MAIN[13][4] | MAIN[14][3] |
| O1_N | MAIN[15][4] | MAIN[13][3] | !MAIN[14][4] |
| O2_P | !MAIN[10][3] | !MAIN[12][4] | MAIN[11][3] |
| O2_N | MAIN[10][4] | MAIN[12][3] | !MAIN[11][4] |
| O3_P | !MAIN[4][3] | !MAIN[6][4] | MAIN[5][3] |
| O3_N | MAIN[4][4] | MAIN[6][3] | !MAIN[5][4] |
| O4_P | !MAIN[9][3] | !MAIN[7][4] | MAIN[8][3] |
| O4_N | MAIN[9][4] | MAIN[7][3] | !MAIN[8][4] |
Bels CIN
| Pin | Direction | CIN |
|---|---|---|
| I | in | CELL.IMUX_CIN |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F4 | IO[0].O2 |
| CELL.IMUX_CLB_G4 | IO[1].O2 |
| CELL.IMUX_CLB_C4 | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.IMUX_CIN | CIN.I |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_S1_W
Cells: 4
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_S[0] | CELL.OCTAL_IO_S[8] | !MAIN[2][5] |
| CELL.OCTAL_IO_S[8] | CELL.OCTAL_IO_S[0] | !MAIN[1][5] |
| CELL.LONG_H[3] | CELL.SINGLE_V[4] | !MAIN[25][5] |
| CELL.LONG_H[4] | CELL.SINGLE_V[5] | !MAIN[15][9] |
| CELL.LONG_H[5] | CELL.SINGLE_V[6] | !MAIN[19][13] |
| CELL.LONG_V[0] | CELL.SINGLE_H_E[1] | !MAIN[14][9] |
| CELL.LONG_V[1] | CELL.SINGLE_H_E[2] | !MAIN[34][12] |
| CELL.LONG_V[2] | CELL.SINGLE_H_E[3] | !MAIN[20][13] |
| CELL.LONG_V[3] | CELL.SINGLE_H[4] | !MAIN[10][9] |
| CELL.LONG_V[4] | CELL.SINGLE_H[5] | !MAIN[13][9] |
| CELL.LONG_V[5] | CELL.SINGLE_H[6] | !MAIN[31][12] |
| CELL.LONG_V[6] | CELL.SINGLE_H_E[0] | !MAIN[39][11] |
| CELL.LONG_V[7] | CELL.SINGLE_H_E[3] | !MAIN[38][11] |
| CELL.LONG_V[8] | CELL.SINGLE_H_E[4] | !MAIN[44][11] |
| CELL.LONG_V[9] | CELL.SINGLE_H_E[7] | !MAIN[45][11] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.TIE_0 | !MAIN[8][9] |
| CELL.SINGLE_H[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[20][10] |
| CELL.SINGLE_H[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[16][10] |
| CELL.SINGLE_H[2] | CELL.OUT_CLB_XQ_S | !MAIN[15][11] |
| CELL.SINGLE_H[3] | CELL.TIE_0 | !MAIN[12][11] |
| CELL.SINGLE_H[3] | CELL.OUT_CLB_X_S | !MAIN[14][13] |
| CELL.SINGLE_H[4] | CELL.LONG_V[3] | !MAIN[31][8] |
| CELL.SINGLE_H[4] | CELL.OUT_IO_SN_I2[0] | !MAIN[19][10] |
| CELL.SINGLE_H[5] | CELL.LONG_V[4] | !MAIN[24][8] |
| CELL.SINGLE_H[5] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][10] |
| CELL.SINGLE_H[6] | CELL.TIE_0 | !MAIN[14][10] |
| CELL.SINGLE_H[6] | CELL.LONG_V[5] | !MAIN[30][13] |
| CELL.SINGLE_H[6] | CELL.OUT_CLB_XQ_S | !MAIN[16][11] |
| CELL.SINGLE_H[7] | CELL.TIE_0 | !MAIN[13][13] |
| CELL.SINGLE_H[7] | CELL.OUT_CLB_X_S | !MAIN[15][13] |
| CELL.SINGLE_H_E[0] | CELL.LONG_V[6] | !MAIN[42][11] |
| CELL.SINGLE_H_E[1] | CELL.LONG_V[0] | !MAIN[28][9] |
| CELL.SINGLE_H_E[2] | CELL.LONG_V[1] | !MAIN[36][13] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[2] | !MAIN[30][10] |
| CELL.SINGLE_H_E[3] | CELL.LONG_V[7] | !MAIN[37][11] |
| CELL.SINGLE_H_E[4] | CELL.LONG_V[8] | !MAIN[43][8] |
| CELL.SINGLE_H_E[7] | CELL.LONG_V[9] | !MAIN[44][8] |
| CELL.SINGLE_V[0] | CELL.TIE_0 | !MAIN[22][10] |
| CELL.SINGLE_V[0] | CELL.DEC_H[3] | !MAIN[20][4] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][5] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][4] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][6] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][4] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][4] |
| CELL.SINGLE_V[3] | CELL.DEC_H[2] | !MAIN[31][4] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][4] |
| CELL.SINGLE_V[4] | CELL.LONG_H[3] | !MAIN[22][11] |
| CELL.SINGLE_V[4] | CELL.DEC_H[1] | !MAIN[36][4] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][6] |
| CELL.SINGLE_V[5] | CELL.LONG_H[4] | !MAIN[36][9] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][4] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][6] |
| CELL.SINGLE_V[6] | CELL.LONG_H[5] | !MAIN[36][11] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][4] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][5] |
| CELL.SINGLE_V[7] | CELL.TIE_0 | !MAIN[22][13] |
| CELL.SINGLE_V[7] | CELL.DEC_H[0] | !MAIN[32][4] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][4] |
| CELL.DOUBLE_H0[0] | CELL.OUT_CLB_XQ_S | !MAIN[14][11] |
| CELL.DOUBLE_H0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[21][10] |
| CELL.DOUBLE_H1[0] | CELL.OUT_CLB_X_S | !MAIN[16][13] |
| CELL.DOUBLE_H1[1] | CELL.OUT_IO_SN_I2[1] | !MAIN[17][10] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][3] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][6] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][3] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][6] |
| CELL.DOUBLE_IO_S0[0] | CELL.DBUF_IO_H[1] | !MAIN[11][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DBUF_IO_H[1] | !MAIN[10][2] |
| CELL.DOUBLE_IO_S0[2] | CELL.DBUF_IO_H[1] | !MAIN[10][1] |
| CELL.DOUBLE_IO_S0[3] | CELL.DBUF_IO_H[1] | !MAIN[11][1] |
| CELL.DOUBLE_IO_S1[0] | CELL.GCLK[4] | !MAIN[39][2] |
| CELL.DOUBLE_IO_S1[1] | CELL.LONG_V[8] | !MAIN[44][3] |
| CELL.DOUBLE_IO_S1[2] | CELL.LONG_V[7] | !MAIN[45][0] |
| CELL.DOUBLE_IO_S1[3] | CELL.GCLK[7] | !MAIN[37][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.DBUF_IO_H[0] | !MAIN[36][2] |
| CELL.DOUBLE_IO_S2[0] | CELL.LONG_V[9] | !MAIN[45][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.DBUF_IO_H[0] | !MAIN[35][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.GCLK[5] | !MAIN[38][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.DBUF_IO_H[0] | !MAIN[35][1] |
| CELL.DOUBLE_IO_S2[2] | CELL.GCLK[6] | !MAIN[37][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.DBUF_IO_H[0] | !MAIN[36][1] |
| CELL.DOUBLE_IO_S2[3] | CELL.LONG_V[6] | !MAIN[43][2] |
| CELL.QUAD_H0[0] | CELL.QBUF[0] | !MAIN[40][14] |
| CELL.QUAD_H0[0] | CELL.OUT_IO_SN_I2[1] | !MAIN[19][14] |
| CELL.QUAD_H0[1] | CELL.QBUF[1] | !MAIN[37][13] |
| CELL.QUAD_H0[1] | CELL.OUT_CLB_X_S | !MAIN[10][14] |
| CELL.QUAD_H0[2] | CELL.QBUF[2] | !MAIN[46][14] |
| CELL.QUAD_H0[2] | CELL.OUT_CLB_XQ_S | !MAIN[11][15] |
| CELL.QUAD_H0[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[6][14] |
| CELL.QUAD_H3[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[7][14] |
| CELL.QUAD_H3[1] | CELL.OUT_CLB_XQ_S | !MAIN[12][15] |
| CELL.QUAD_H3[2] | CELL.OUT_CLB_X_S | !MAIN[11][14] |
| CELL.QUAD_H3[2] | CELL.OUT_IO_SN_I2[1] | !MAIN[18][14] |
| CELL.QUAD_H4[0] | CELL.QBUF[0] | !MAIN[39][14] |
| CELL.QUAD_H4[1] | CELL.QBUF[1] | !MAIN[39][13] |
| CELL.QUAD_H4[2] | CELL.QBUF[2] | !MAIN[45][14] |
| CELL.QUAD_V0[0] | CELL.QBUF[0] | !MAIN[41][14] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][6] |
| CELL.QUAD_V0[1] | CELL.QBUF[1] | !MAIN[37][14] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][0] |
| CELL.QUAD_V0[2] | CELL.QBUF[2] | !MAIN[46][15] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][1] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][5] |
| CELL.QUAD_V3[0] | CELL.DEC_H[2] | !MAIN[41][0] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][5] |
| CELL.QUAD_V3[1] | CELL.DEC_H[1] | !MAIN[40][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.DEC_H[0] | !MAIN[45][5] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][6] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][4] |
| CELL.QUAD_V4[0] | CELL.QBUF[0] | !MAIN[38][14] |
| CELL.QUAD_V4[1] | CELL.QBUF[1] | !MAIN[38][13] |
| CELL.QUAD_V4[2] | CELL.QBUF[2] | !MAIN[44][14] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_H[0] | CELL.SINGLE_H_E[0] | !MAIN[24][10] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V[0] | !MAIN[23][9] |
| CELL.SINGLE_H[0] | CELL.SINGLE_V_S[0] | !MAIN[26][8] |
| CELL.SINGLE_H[1] | CELL.SINGLE_H_E[1] | !MAIN[26][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V[1] | !MAIN[25][9] |
| CELL.SINGLE_H[1] | CELL.SINGLE_V_S[1] | !MAIN[25][8] |
| CELL.SINGLE_H[2] | CELL.SINGLE_H_E[2] | !MAIN[28][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V[2] | !MAIN[27][12] |
| CELL.SINGLE_H[2] | CELL.SINGLE_V_S[2] | !MAIN[29][12] |
| CELL.SINGLE_H[3] | CELL.SINGLE_H_E[3] | !MAIN[27][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V[3] | !MAIN[24][11] |
| CELL.SINGLE_H[3] | CELL.SINGLE_V_S[3] | !MAIN[26][11] |
| CELL.SINGLE_H[4] | CELL.SINGLE_H_E[4] | !MAIN[32][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V[4] | !MAIN[35][10] |
| CELL.SINGLE_H[4] | CELL.SINGLE_V_S[4] | !MAIN[31][10] |
| CELL.SINGLE_H[5] | CELL.SINGLE_H_E[5] | !MAIN[31][9] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V[5] | !MAIN[32][8] |
| CELL.SINGLE_H[5] | CELL.SINGLE_V_S[5] | !MAIN[33][9] |
| CELL.SINGLE_H[6] | CELL.SINGLE_H_E[6] | !MAIN[31][11] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V[6] | !MAIN[32][12] |
| CELL.SINGLE_H[6] | CELL.SINGLE_V_S[6] | !MAIN[32][11] |
| CELL.SINGLE_H[7] | CELL.SINGLE_H_E[7] | !MAIN[34][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V[7] | !MAIN[31][13] |
| CELL.SINGLE_H[7] | CELL.SINGLE_V_S[7] | !MAIN[33][12] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V[0] | !MAIN[22][9] |
| CELL.SINGLE_H_E[0] | CELL.SINGLE_V_S[0] | !MAIN[24][9] |
| CELL.SINGLE_H_E[0] | CELL.QUAD_V1[0] | !MAIN[43][11] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V[1] | !MAIN[26][10] |
| CELL.SINGLE_H_E[1] | CELL.SINGLE_V_S[1] | !MAIN[27][9] |
| CELL.SINGLE_H_E[1] | CELL.QUAD_V3[0] | !MAIN[41][11] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V[2] | !MAIN[27][13] |
| CELL.SINGLE_H_E[2] | CELL.SINGLE_V_S[2] | !MAIN[28][13] |
| CELL.SINGLE_H_E[2] | CELL.QUAD_V2[0] | !MAIN[37][12] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V[3] | !MAIN[28][11] |
| CELL.SINGLE_H_E[3] | CELL.SINGLE_V_S[3] | !MAIN[29][11] |
| CELL.SINGLE_H_E[3] | CELL.QUAD_V0[1] | !MAIN[45][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V[4] | !MAIN[35][12] |
| CELL.SINGLE_H_E[4] | CELL.SINGLE_V_S[4] | !MAIN[33][10] |
| CELL.SINGLE_H_E[4] | CELL.QUAD_V0[2] | !MAIN[40][11] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V[5] | !MAIN[32][9] |
| CELL.SINGLE_H_E[5] | CELL.SINGLE_V_S[5] | !MAIN[34][9] |
| CELL.SINGLE_H_E[5] | CELL.QUAD_V1[1] | !MAIN[42][12] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V[6] | !MAIN[30][11] |
| CELL.SINGLE_H_E[6] | CELL.SINGLE_V_S[6] | !MAIN[33][11] |
| CELL.SINGLE_H_E[6] | CELL.QUAD_V3[2] | !MAIN[43][12] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V[7] | !MAIN[33][13] |
| CELL.SINGLE_H_E[7] | CELL.SINGLE_V_S[7] | !MAIN[35][13] |
| CELL.SINGLE_H_E[7] | CELL.QUAD_V2[2] | !MAIN[38][12] |
| CELL.SINGLE_V[0] | CELL.SINGLE_V_S[0] | !MAIN[25][10] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_S1[0] | !MAIN[19][1] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_S[7] | !MAIN[22][7] |
| CELL.SINGLE_V[1] | CELL.SINGLE_V_S[1] | !MAIN[27][8] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_S0[0] | !MAIN[23][2] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_S2[0] | !MAIN[25][2] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_S[6] | !MAIN[23][7] |
| CELL.SINGLE_V[2] | CELL.SINGLE_V_S[2] | !MAIN[26][13] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_S1[1] | !MAIN[26][3] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_S[5] | !MAIN[27][7] |
| CELL.SINGLE_V[3] | CELL.SINGLE_V_S[3] | !MAIN[23][11] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_S0[1] | !MAIN[28][2] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_S2[1] | !MAIN[27][1] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_S[4] | !MAIN[30][7] |
| CELL.SINGLE_V[4] | CELL.SINGLE_V_S[4] | !MAIN[34][10] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_S1[2] | !MAIN[29][2] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_S[3] | !MAIN[40][7] |
| CELL.SINGLE_V[5] | CELL.SINGLE_V_S[5] | !MAIN[35][9] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_S0[2] | !MAIN[31][2] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_S2[2] | !MAIN[30][1] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_S[2] | !MAIN[36][7] |
| CELL.SINGLE_V[6] | CELL.SINGLE_V_S[6] | !MAIN[34][11] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][3] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_S[1] | !MAIN[37][7] |
| CELL.SINGLE_V[7] | CELL.SINGLE_V_S[7] | !MAIN[32][13] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_S0[3] | !MAIN[33][1] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][2] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_S[0] | !MAIN[33][7] |
| CELL.SINGLE_V_S[0] | CELL.QUAD_H2[0] | !MAIN[22][14] |
| CELL.SINGLE_V_S[1] | CELL.QUAD_H0[0] | !MAIN[25][14] |
| CELL.SINGLE_V_S[2] | CELL.QUAD_H2[1] | !MAIN[25][15] |
| CELL.SINGLE_V_S[3] | CELL.QUAD_H1[1] | !MAIN[33][15] |
| CELL.SINGLE_V_S[4] | CELL.QUAD_H0[1] | !MAIN[33][14] |
| CELL.SINGLE_V_S[5] | CELL.QUAD_H3[2] | !MAIN[32][14] |
| CELL.SINGLE_V_S[6] | CELL.QUAD_H2[2] | !MAIN[34][14] |
| CELL.SINGLE_V_S[7] | CELL.QUAD_H1[2] | !MAIN[32][15] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_H2[0] | !MAIN[25][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V0[0] | !MAIN[23][13] |
| CELL.DOUBLE_H0[0] | CELL.DOUBLE_V2[0] | !MAIN[24][13] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_H2[1] | !MAIN[29][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V0[1] | !MAIN[28][10] |
| CELL.DOUBLE_H0[1] | CELL.DOUBLE_V2[1] | !MAIN[29][8] |
| CELL.DOUBLE_H1[1] | CELL.QUAD_V3[1] | !MAIN[40][12] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V0[0] | !MAIN[25][11] |
| CELL.DOUBLE_H2[0] | CELL.DOUBLE_V2[0] | !MAIN[25][12] |
| CELL.DOUBLE_H2[0] | CELL.QUAD_V0[0] | !MAIN[39][12] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V0[1] | !MAIN[29][9] |
| CELL.DOUBLE_H2[1] | CELL.DOUBLE_V2[1] | !MAIN[30][9] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_V2[0] | !MAIN[23][12] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S0[1] | !MAIN[27][2] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S1[1] | !MAIN[25][3] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_S2[1] | !MAIN[28][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_V2[1] | !MAIN[30][8] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S0[2] | !MAIN[29][1] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S1[2] | !MAIN[30][2] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][1] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S0[0] | !MAIN[22][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S1[0] | !MAIN[21][2] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[26][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S0[3] | !MAIN[32][2] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S1[3] | !MAIN[32][1] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_S2[3] | !MAIN[34][2] |
| CELL.DOUBLE_V1[1] | CELL.QUAD_H0[2] | !MAIN[31][14] |
| CELL.DOUBLE_V2[0] | CELL.QUAD_H3[0] | !MAIN[21][14] |
| CELL.DOUBLE_IO_S0[0] | CELL.DOUBLE_IO_S2[0] | !MAIN[24][2] |
| CELL.DOUBLE_IO_S0[1] | CELL.DOUBLE_IO_S2[1] | !MAIN[26][1] |
| CELL.DOUBLE_IO_S0[2] | CELL.DOUBLE_IO_S2[2] | !MAIN[31][3] |
| CELL.DOUBLE_IO_S0[3] | CELL.DOUBLE_IO_S2[3] | !MAIN[33][3] |
| CELL.DOUBLE_IO_S1[0] | CELL.QUAD_V2[0] | !MAIN[41][1] |
| CELL.DOUBLE_IO_S1[1] | CELL.QUAD_V1[1] | !MAIN[42][2] |
| CELL.DOUBLE_IO_S1[2] | CELL.QUAD_V3[1] | !MAIN[40][1] |
| CELL.DOUBLE_IO_S1[3] | CELL.QUAD_V2[2] | !MAIN[38][1] |
| CELL.DOUBLE_IO_S2[0] | CELL.QUAD_V1[0] | !MAIN[41][2] |
| CELL.DOUBLE_IO_S2[1] | CELL.QUAD_V3[0] | !MAIN[46][2] |
| CELL.DOUBLE_IO_S2[2] | CELL.QUAD_V2[1] | !MAIN[39][0] |
| CELL.DOUBLE_IO_S2[3] | CELL.QUAD_V1[2] | !MAIN[39][1] |
| CELL.QUAD_H0[0] | CELL.QUAD_H4[0] | !MAIN[38][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V0[0] | !MAIN[39][15] |
| CELL.QUAD_H0[0] | CELL.QUAD_V4[0] | !MAIN[35][15] |
| CELL.QUAD_H0[1] | CELL.QUAD_H4[1] | !MAIN[44][12] |
| CELL.QUAD_H0[1] | CELL.QUAD_V0[1] | !MAIN[42][13] |
| CELL.QUAD_H0[1] | CELL.QUAD_V4[1] | !MAIN[43][13] |
| CELL.QUAD_H0[2] | CELL.QUAD_H4[2] | !MAIN[44][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V0[2] | !MAIN[45][15] |
| CELL.QUAD_H0[2] | CELL.QUAD_V4[2] | !MAIN[41][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V0[0] | !MAIN[37][15] |
| CELL.QUAD_H4[0] | CELL.QUAD_V4[0] | !MAIN[36][15] |
| CELL.QUAD_H4[1] | CELL.QUAD_V0[1] | !MAIN[45][13] |
| CELL.QUAD_H4[1] | CELL.QUAD_V4[1] | !MAIN[46][13] |
| CELL.QUAD_H4[2] | CELL.QUAD_V0[2] | !MAIN[43][15] |
| CELL.QUAD_H4[2] | CELL.QUAD_V4[2] | !MAIN[42][15] |
| CELL.QUAD_V0[0] | CELL.QUAD_V4[0] | !MAIN[34][15] |
| CELL.QUAD_V0[0] | CELL.LONG_IO_H[0] | !MAIN[45][3] |
| CELL.QUAD_V0[1] | CELL.QUAD_V4[1] | !MAIN[44][13] |
| CELL.QUAD_V0[1] | CELL.LONG_IO_H[1] | !MAIN[46][4] |
| CELL.QUAD_V0[2] | CELL.QUAD_V4[2] | !MAIN[40][15] |
| CELL.QUAD_V0[2] | CELL.LONG_IO_H[3] | !MAIN[45][4] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][2] | MAIN[9][2] | MAIN[8][1] | MAIN[9][1] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][3] | MAIN[35][3] | MAIN[36][3] | MAIN[34][1] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_S2[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_S2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_S2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[35][14] | MAIN[36][14] | CELL.QBUF[0] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[0] |
| 0 | 1 | CELL.QUAD_V0[0] |
| 1 | 0 | CELL.QUAD_H0[0] |
| 1 | 1 | CELL.QUAD_H4[0] |
| Bits | Destination | |
|---|---|---|
| MAIN[40][13] | MAIN[41][13] | CELL.QBUF[1] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[1] |
| 0 | 1 | CELL.QUAD_V0[1] |
| 1 | 0 | CELL.QUAD_H0[1] |
| 1 | 1 | CELL.QUAD_H4[1] |
| Bits | Destination | |
|---|---|---|
| MAIN[42][14] | MAIN[43][14] | CELL.QBUF[2] |
| Source | ||
| 0 | 0 | CELL.QUAD_V4[2] |
| 0 | 1 | CELL.QUAD_V0[2] |
| 1 | 0 | CELL.QUAD_H0[2] |
| 1 | 1 | CELL.QUAD_H4[2] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][5] | MAIN[28][5] | MAIN[30][5] | MAIN[29][5] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][5] | MAIN[34][5] | MAIN[35][6] | MAIN[35][5] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][5] | MAIN[31][5] | MAIN[33][5] | MAIN[34][6] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][5] | MAIN[7][6] | MAIN[8][6] | MAIN[8][5] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][5] | MAIN[2][6] | MAIN[3][6] | MAIN[3][5] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][5] | MAIN[9][6] | MAIN[10][5] | MAIN[10][6] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][5] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][5] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][6] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][6] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][6] | MAIN[17][4] | MAIN[43][5] | MAIN[44][5] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][3] | MAIN[15][2] | MAIN[19][4] | MAIN[18][1] | MAIN[40][5] | MAIN[38][5] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][3] | MAIN[21][4] | MAIN[22][4] | MAIN[23][4] | MAIN[43][6] | MAIN[44][6] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][5] | MAIN[24][4] | MAIN[39][6] | MAIN[37][6] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][0] | MAIN[43][1] | MAIN[42][1] | MAIN[44][2] | MAIN[44][1] | MAIN[45][1] | MAIN[46][1] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.QUAD_V0[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[2] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[0] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S2[3] |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[40][3] | MAIN[42][3] | MAIN[43][3] | MAIN[41][4] | MAIN[43][4] | MAIN[42][4] | MAIN[41][3] | CELL.ECLK_H |
| Source | |||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.GCLK[4] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | CELL.LONG_IO_H[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_W.OUT_BUFGE_V |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[11][13] | MAIN[11][11] | MAIN[12][10] | MAIN[12][12] | MAIN[12][13] | MAIN[13][12] | MAIN[13][11] | MAIN[13][10] | MAIN[15][15] | MAIN[16][14] | MAIN[17][14] | MAIN[16][15] | MAIN[12][14] | MAIN[10][15] | MAIN[17][15] | CELL.IMUX_CLB_F2 |
| Source | |||||||||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[10][11] | MAIN[10][12] | MAIN[9][10] | MAIN[9][11] | MAIN[11][10] | MAIN[9][13] | MAIN[10][13] | MAIN[11][12] | MAIN[29][15] | MAIN[29][14] | MAIN[30][14] | MAIN[30][15] | MAIN[31][15] | MAIN[14][14] | MAIN[14][15] | CELL.IMUX_CLB_F4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[3][11] | MAIN[4][11] | MAIN[4][13] | MAIN[3][10] | MAIN[4][12] | MAIN[3][12] | MAIN[3][13] | MAIN[4][10] | MAIN[5][12] | MAIN[4][14] | MAIN[4][15] | MAIN[5][14] | MAIN[5][15] | MAIN[9][14] | MAIN[7][15] | MAIN[6][15] | CELL.IMUX_CLB_G2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SPECIAL_CLB_COUT0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_V[8] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| Bits | Destination | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[6][13] | MAIN[5][13] | MAIN[7][12] | MAIN[5][10] | MAIN[5][11] | MAIN[6][11] | MAIN[6][12] | MAIN[6][10] | MAIN[23][14] | MAIN[22][15] | MAIN[24][14] | MAIN[23][15] | MAIN[24][15] | MAIN[13][14] | MAIN[9][15] | CELL.IMUX_CLB_G4 |
| Source | |||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[5] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[9] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[1][11] | MAIN[1][10] | MAIN[2][11] | MAIN[2][13] | MAIN[1][12] | MAIN[1][13] | MAIN[2][10] | MAIN[2][12] | MAIN[1][14] | MAIN[1][15] | MAIN[2][14] | MAIN[2][15] | MAIN[8][14] | MAIN[8][15] | MAIN[3][15] | MAIN[3][14] | CELL.IMUX_CLB_C2 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[6] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| Bits | Destination | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[8][11] | MAIN[9][12] | MAIN[7][11] | MAIN[7][10] | MAIN[8][13] | MAIN[8][12] | MAIN[7][13] | MAIN[8][10] | MAIN[26][15] | MAIN[26][14] | MAIN[27][14] | MAIN[27][15] | MAIN[28][15] | MAIN[28][14] | MAIN[15][14] | MAIN[13][15] | CELL.IMUX_CLB_C4 |
| Source | ||||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[1] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[0] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[4] |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_H[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[3] |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H0[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H2[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H3[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[2] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[0] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.QUAD_H1[1] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[8] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.OUT_CLB_X_S |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.OUT_CLB_XQ_S |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H1[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_H0[1] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[4] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[7] |
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_N.LONG_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_H[5] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][4] | MAIN[29][4] | MAIN[37][4] | MAIN[39][3] | MAIN[38][3] | MAIN[37][3] | MAIN[40][4] | MAIN[27][3] | MAIN[30][3] | MAIN[28][3] | MAIN[29][3] | MAIN[28][4] | MAIN[39][4] | MAIN[38][4] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[40][3] | MAIN_E[41][4] | MAIN[3][4] | MAIN[1][4] | MAIN[4][5] | MAIN[3][3] | MAIN[2][4] | MAIN[2][3] | MAIN_E[41][3] | MAIN_E[42][3] | MAIN_E[43][3] | MAIN_E[43][4] | MAIN[1][3] | MAIN_E[42][4] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][5] | MAIN[24][6] | MAIN[25][6] | MAIN[26][6] | MAIN[27][6] | MAIN[29][6] | MAIN[30][6] | MAIN[28][6] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][6] | MAIN[12][6] | MAIN[11][5] | MAIN[13][5] | MAIN[12][5] | MAIN[14][5] | MAIN[14][6] | MAIN[13][6] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][5] | MAIN[20][5] | MAIN[21][5] | MAIN[22][5] | MAIN[19][6] | MAIN[20][6] | MAIN[22][6] | MAIN[21][6] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][6] | MAIN[17][6] | MAIN[15][5] | MAIN[16][5] | MAIN[17][5] | MAIN[18][5] | MAIN[18][6] | MAIN[16][6] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][2] | MAIN[4][2] | MAIN[7][0] | MAIN[7][1] | MAIN[7][2] | MAIN[5][2] | MAIN[6][1] | MAIN[5][1] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[0] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[1][1] | MAIN[2][2] | MAIN[12][2] | MAIN[3][1] | MAIN[3][2] | MAIN[4][1] | MAIN[2][1] | MAIN[1][2] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_S0[1] |
| 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_S1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_S1[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[38][8] | MAIN[41][8] | MAIN[40][8] | MAIN[39][8] | CELL.IMUX_CIN |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.QUAD_V3[0] |
| 0 | 1 | 0 | 1 | CELL.LONG_V[9] |
| 0 | 1 | 1 | 0 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][0] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][0] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][0] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][0] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F4 | CELL.IMUX_CLB_G4 |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][0] | CELL.IMUX_IO_T[1] invert by !MAIN[1][0] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| CLKIN | out | CELL.OUT_IO_CLKIN | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][0] | !MAIN[13][0] |
| OFF_SRVAL bit 0 | !MAIN[25][1] | !MAIN[12][1] |
| READBACK_I1 bit 0 | !MAIN[19][3] | !MAIN[18][2] |
| READBACK_I2 bit 0 | !MAIN[19][2] | !MAIN[18][3] |
| READBACK_OQ bit 0 | !MAIN[17][3] | !MAIN[17][2] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][0] | !MAIN[10][0] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][0] | MAIN[11][0] |
| IFF_CE_ENABLE | !MAIN[20][1] | !MAIN[14][2] |
| OFF_CE_ENABLE | !MAIN[31][0] | !MAIN[13][2] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][0] | !MAIN[40][0] |
| IO[0].SLEW | MAIN[34][0] |
|---|---|
| IO[1].SLEW | MAIN[2][0] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][1] | MAIN[24][1] |
|---|---|---|
| IO[1].PULL | MAIN[14][1] | MAIN[13][1] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][0] | MAIN[18][0] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][0] | MAIN[16][1] |
| IO[0].MUX_I2 | MAIN[22][0] | MAIN[21][0] |
| IO[1].MUX_I2 | MAIN[16][0] | MAIN[15][0] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][0] | MAIN[21][1] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][1] | MAIN[15][1] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][0] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][0] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][0] | MAIN[28][0] | MAIN[30][0] | MAIN[32][0] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][0] | MAIN[4][0] | MAIN[8][0] | MAIN[6][0] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][1] |
|---|---|
| IO[1].SYNC_D | MAIN[12][0] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C4 | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[15][3] | !MAIN[13][4] | MAIN[14][3] |
| O1_N | MAIN[15][4] | MAIN[13][3] | !MAIN[14][4] |
| O2_P | !MAIN[10][3] | !MAIN[12][4] | MAIN[11][3] |
| O2_N | MAIN[10][4] | MAIN[12][3] | !MAIN[11][4] |
| O3_P | !MAIN[4][3] | !MAIN[6][4] | MAIN[5][3] |
| O3_N | MAIN[4][4] | MAIN[6][3] | !MAIN[5][4] |
| O4_P | !MAIN[9][3] | !MAIN[7][4] | MAIN[8][3] |
| O4_N | MAIN[9][4] | MAIN[7][3] | !MAIN[8][4] |
Bels CIN
| Pin | Direction | CIN |
|---|---|---|
| I | in | CELL.IMUX_CIN |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F4 | IO[0].O2 |
| CELL.IMUX_CLB_G4 | IO[1].O2 |
| CELL.IMUX_CLB_C4 | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.IMUX_CIN | CIN.I |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[0].CLKIN |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_N0
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_N[0] | CELL.OCTAL_IO_N[8] | !MAIN[1][2] |
| CELL.OCTAL_IO_N[8] | CELL.OCTAL_IO_N[0] | !MAIN[2][2] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[22][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[26][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[25][2] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DEC_H[0] | !MAIN[20][3] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][2] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[24][8] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][3] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][1] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[30][8] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][3] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][3] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[29][9] |
| CELL.SINGLE_V[3] | CELL.DEC_H[1] | !MAIN[31][3] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][3] |
| CELL.SINGLE_V[4] | CELL.DEC_H[2] | !MAIN[36][3] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][1] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][3] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][1] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][3] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][2] |
| CELL.SINGLE_V[7] | CELL.DEC_H[3] | !MAIN[32][3] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][3] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][1] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][1] |
| CELL.DOUBLE_IO_N0[0] | CELL.DBUF_IO_H[0] | !MAIN[36][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.LONG_V[9] | !MAIN[45][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DBUF_IO_H[0] | !MAIN[35][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.GCLK[5] | !MAIN[38][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DBUF_IO_H[0] | !MAIN[35][6] |
| CELL.DOUBLE_IO_N0[2] | CELL.GCLK[6] | !MAIN[37][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DBUF_IO_H[0] | !MAIN[36][6] |
| CELL.DOUBLE_IO_N0[3] | CELL.LONG_V[6] | !MAIN[43][5] |
| CELL.DOUBLE_IO_N1[0] | CELL.GCLK[4] | !MAIN[39][5] |
| CELL.DOUBLE_IO_N1[1] | CELL.LONG_V[8] | !MAIN[44][4] |
| CELL.DOUBLE_IO_N1[2] | CELL.LONG_V[7] | !MAIN[45][7] |
| CELL.DOUBLE_IO_N1[3] | CELL.GCLK[7] | !MAIN[37][5] |
| CELL.DOUBLE_IO_N2[0] | CELL.DBUF_IO_H[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_N2[1] | CELL.DBUF_IO_H[1] | !MAIN[10][5] |
| CELL.DOUBLE_IO_N2[2] | CELL.DBUF_IO_H[1] | !MAIN[10][6] |
| CELL.DOUBLE_IO_N2[3] | CELL.DBUF_IO_H[1] | !MAIN[11][6] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][1] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][7] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][6] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][2] |
| CELL.QUAD_V2[0] | CELL.DEC_H[1] | !MAIN[41][7] |
| CELL.QUAD_V2[0] | CELL.OUT_COUT_E | !MAIN[45][2] |
| CELL.QUAD_V2[1] | CELL.DEC_H[2] | !MAIN[40][5] |
| CELL.QUAD_V2[2] | CELL.DEC_H[3] | !MAIN[46][2] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][1] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][3] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_N0[0] | !MAIN[25][5] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[23][5] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_N[1] | !MAIN[22][0] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_N1[0] | !MAIN[19][6] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_N[2] | !MAIN[23][0] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_N0[1] | !MAIN[27][6] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_N2[1] | !MAIN[28][5] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_N[3] | !MAIN[27][0] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_N1[1] | !MAIN[26][4] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_N[4] | !MAIN[30][0] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_N0[2] | !MAIN[30][6] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][5] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_N[5] | !MAIN[40][0] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_N1[2] | !MAIN[29][5] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_N[6] | !MAIN[36][0] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_N0[3] | !MAIN[33][5] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][6] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_N[7] | !MAIN[37][0] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][4] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_N[8] | !MAIN[33][0] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N0[1] | !MAIN[28][6] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N1[1] | !MAIN[25][4] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N2[1] | !MAIN[27][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N0[2] | !MAIN[31][6] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N1[2] | !MAIN[30][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N2[2] | !MAIN[29][6] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N0[0] | !MAIN[26][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N1[0] | !MAIN[21][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[22][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N0[3] | !MAIN[34][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][6] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N2[3] | !MAIN[32][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[24][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.QUAD_V1[0] | !MAIN[41][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DOUBLE_IO_N2[1] | !MAIN[26][6] |
| CELL.DOUBLE_IO_N0[1] | CELL.QUAD_V0[0] | !MAIN[46][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][4] |
| CELL.DOUBLE_IO_N0[2] | CELL.QUAD_V2[1] | !MAIN[39][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][4] |
| CELL.DOUBLE_IO_N0[3] | CELL.QUAD_V1[2] | !MAIN[39][6] |
| CELL.DOUBLE_IO_N1[0] | CELL.QUAD_V2[0] | !MAIN[41][6] |
| CELL.DOUBLE_IO_N1[1] | CELL.QUAD_V1[1] | !MAIN[42][5] |
| CELL.DOUBLE_IO_N1[2] | CELL.QUAD_V0[1] | !MAIN[40][6] |
| CELL.DOUBLE_IO_N1[3] | CELL.QUAD_V0[2] | !MAIN[38][6] |
| CELL.QUAD_V3[0] | CELL.LONG_IO_H[0] | !MAIN[45][4] |
| CELL.QUAD_V3[1] | CELL.LONG_IO_H[1] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.LONG_IO_H[3] | !MAIN[45][3] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][5] | MAIN[9][5] | MAIN[8][6] | MAIN[9][6] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][4] | MAIN[35][4] | MAIN[36][4] | MAIN[34][6] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][2] | MAIN[28][2] | MAIN[30][2] | MAIN[29][2] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][2] | MAIN[34][2] | MAIN[35][1] | MAIN[35][2] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][2] | MAIN[31][2] | MAIN[33][2] | MAIN[34][1] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][2] | MAIN[7][1] | MAIN[8][1] | MAIN[8][2] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][2] | MAIN[2][1] | MAIN[3][1] | MAIN[3][2] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][2] | MAIN[9][1] | MAIN[10][2] | MAIN[10][1] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][2] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][2] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][1] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][1] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][1] | MAIN[17][3] | MAIN[43][2] | MAIN[44][2] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][4] | MAIN[15][5] | MAIN[19][3] | MAIN[18][6] | MAIN[40][2] | MAIN[38][2] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][4] | MAIN[21][3] | MAIN[22][3] | MAIN[23][3] | MAIN[43][1] | MAIN[44][1] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][2] | MAIN[24][3] | MAIN[39][1] | MAIN[37][1] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][7] | MAIN[44][5] | MAIN[43][6] | MAIN[42][6] | MAIN[44][6] | MAIN[45][6] | MAIN[46][6] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL.OUT_COUT_E |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[3] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][3] | MAIN[29][3] | MAIN[37][3] | MAIN[39][4] | MAIN[38][4] | MAIN[37][4] | MAIN[40][3] | MAIN[27][4] | MAIN[30][4] | MAIN[28][4] | MAIN[29][4] | MAIN[28][3] | MAIN[39][3] | MAIN[38][3] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[40][4] | MAIN_E[41][3] | MAIN[3][3] | MAIN[1][3] | MAIN[4][2] | MAIN[2][4] | MAIN[2][3] | MAIN[3][4] | MAIN_E[41][4] | MAIN_E[42][4] | MAIN_E[43][4] | MAIN_E[43][3] | MAIN[1][4] | MAIN_E[42][3] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][2] | MAIN[24][1] | MAIN[25][1] | MAIN[26][1] | MAIN[27][1] | MAIN[29][1] | MAIN[30][1] | MAIN[28][1] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][1] | MAIN[12][1] | MAIN[11][2] | MAIN[13][2] | MAIN[12][2] | MAIN[14][2] | MAIN[14][1] | MAIN[13][1] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][2] | MAIN[20][2] | MAIN[21][2] | MAIN[22][2] | MAIN[19][1] | MAIN[20][1] | MAIN[22][1] | MAIN[21][1] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][1] | MAIN[17][1] | MAIN[15][2] | MAIN[16][2] | MAIN[17][2] | MAIN[18][2] | MAIN[18][1] | MAIN[16][1] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][5] | MAIN[4][5] | MAIN[7][7] | MAIN[7][5] | MAIN[5][5] | MAIN[7][6] | MAIN[6][6] | MAIN[5][6] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.GCLK[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][5] | MAIN[1][6] | MAIN[12][5] | MAIN[4][6] | MAIN[3][6] | MAIN[3][5] | MAIN[2][6] | MAIN[1][5] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][7] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][7] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][7] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][7] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F2_N | CELL.IMUX_CLB_G2_N |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][7] | CELL.IMUX_IO_T[1] invert by !MAIN[1][7] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][7] | !MAIN[13][7] |
| OFF_SRVAL bit 0 | !MAIN[25][6] | !MAIN[12][6] |
| READBACK_I1 bit 0 | !MAIN[19][4] | !MAIN[18][5] |
| READBACK_I2 bit 0 | !MAIN[19][5] | !MAIN[18][4] |
| READBACK_OQ bit 0 | !MAIN[17][4] | !MAIN[17][5] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][7] | !MAIN[10][7] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][7] | MAIN[11][7] |
| IFF_CE_ENABLE | !MAIN[20][6] | !MAIN[14][5] |
| OFF_CE_ENABLE | !MAIN[31][7] | !MAIN[13][5] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][7] | !MAIN[40][7] |
| IO[0].SLEW | MAIN[34][7] |
|---|---|
| IO[1].SLEW | MAIN[2][7] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][6] | MAIN[24][6] |
|---|---|---|
| IO[1].PULL | MAIN[14][6] | MAIN[13][6] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][7] | MAIN[18][7] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][7] | MAIN[16][6] |
| IO[0].MUX_I2 | MAIN[22][7] | MAIN[21][7] |
| IO[1].MUX_I2 | MAIN[16][7] | MAIN[15][7] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][7] | MAIN[21][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][6] | MAIN[15][6] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][7] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][7] | MAIN[28][7] | MAIN[30][7] | MAIN[32][7] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][7] | MAIN[4][7] | MAIN[8][7] | MAIN[6][7] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[12][7] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C2_N | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[9][4] | !MAIN[7][3] | MAIN[8][4] |
| O1_N | MAIN[9][3] | MAIN[7][4] | !MAIN[8][3] |
| O2_P | !MAIN[4][4] | !MAIN[6][3] | MAIN[5][4] |
| O2_N | MAIN[4][3] | MAIN[6][4] | !MAIN[5][3] |
| O3_P | !MAIN[10][4] | !MAIN[12][3] | MAIN[11][4] |
| O3_N | MAIN[10][3] | MAIN[12][4] | !MAIN[11][3] |
| O4_P | !MAIN[15][4] | !MAIN[13][3] | MAIN[14][4] |
| O4_N | MAIN[15][3] | MAIN[13][4] | !MAIN[14][3] |
Bels COUT
| Pin | Direction | COUT |
|---|---|---|
| O | out | CELL.OUT_COUT |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F2_N | IO[0].O2 |
| CELL.IMUX_CLB_G2_N | IO[1].O2 |
| CELL.IMUX_CLB_C2_N | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
| CELL.OUT_COUT | COUT.O |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_N0_E
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_N[0] | CELL.OCTAL_IO_N[8] | !MAIN[1][2] |
| CELL.OCTAL_IO_N[8] | CELL.OCTAL_IO_N[0] | !MAIN[2][2] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[22][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[26][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[25][2] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DEC_H[0] | !MAIN[20][3] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][2] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[24][8] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][3] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][1] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[30][8] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][3] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][3] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[29][9] |
| CELL.SINGLE_V[3] | CELL.DEC_H[1] | !MAIN[31][3] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][3] |
| CELL.SINGLE_V[4] | CELL.DEC_H[2] | !MAIN[36][3] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][1] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][3] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][1] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][3] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][2] |
| CELL.SINGLE_V[7] | CELL.DEC_H[3] | !MAIN[32][3] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][3] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][1] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][1] |
| CELL.DOUBLE_IO_N0[0] | CELL.DBUF_IO_H[0] | !MAIN[36][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.LONG_V[9] | !MAIN[45][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DBUF_IO_H[0] | !MAIN[35][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.GCLK[5] | !MAIN[38][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DBUF_IO_H[0] | !MAIN[35][6] |
| CELL.DOUBLE_IO_N0[2] | CELL.GCLK[6] | !MAIN[37][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DBUF_IO_H[0] | !MAIN[36][6] |
| CELL.DOUBLE_IO_N0[3] | CELL.LONG_V[6] | !MAIN[43][5] |
| CELL.DOUBLE_IO_N1[0] | CELL.GCLK[4] | !MAIN[39][5] |
| CELL.DOUBLE_IO_N1[1] | CELL.LONG_V[8] | !MAIN[44][4] |
| CELL.DOUBLE_IO_N1[2] | CELL.LONG_V[7] | !MAIN[45][7] |
| CELL.DOUBLE_IO_N1[3] | CELL.GCLK[7] | !MAIN[37][5] |
| CELL.DOUBLE_IO_N2[0] | CELL.DBUF_IO_H[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_N2[1] | CELL.DBUF_IO_H[1] | !MAIN[10][5] |
| CELL.DOUBLE_IO_N2[2] | CELL.DBUF_IO_H[1] | !MAIN[10][6] |
| CELL.DOUBLE_IO_N2[3] | CELL.DBUF_IO_H[1] | !MAIN[11][6] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][1] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][7] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][6] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][2] |
| CELL.QUAD_V2[0] | CELL.DEC_H[1] | !MAIN[41][7] |
| CELL.QUAD_V2[0] | CELL.OUT_COUT_E | !MAIN[45][2] |
| CELL.QUAD_V2[1] | CELL.DEC_H[2] | !MAIN[40][5] |
| CELL.QUAD_V2[2] | CELL.DEC_H[3] | !MAIN[46][2] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][1] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][3] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_N0[0] | !MAIN[25][5] |
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[23][5] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_N[1] | !MAIN[22][0] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_N1[0] | !MAIN[19][6] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_N[2] | !MAIN[23][0] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_N0[1] | !MAIN[27][6] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_N2[1] | !MAIN[28][5] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_N[3] | !MAIN[27][0] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_N1[1] | !MAIN[26][4] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_N[4] | !MAIN[30][0] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_N0[2] | !MAIN[30][6] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][5] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_N[5] | !MAIN[40][0] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_N1[2] | !MAIN[29][5] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_N[6] | !MAIN[36][0] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_N0[3] | !MAIN[33][5] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][6] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_N[7] | !MAIN[37][0] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][4] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_N[8] | !MAIN[33][0] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N0[1] | !MAIN[28][6] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N1[1] | !MAIN[25][4] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N2[1] | !MAIN[27][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N0[2] | !MAIN[31][6] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N1[2] | !MAIN[30][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N2[2] | !MAIN[29][6] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N0[0] | !MAIN[26][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N1[0] | !MAIN[21][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[22][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N0[3] | !MAIN[34][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][6] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N2[3] | !MAIN[32][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[24][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.QUAD_V1[0] | !MAIN[41][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DOUBLE_IO_N2[1] | !MAIN[26][6] |
| CELL.DOUBLE_IO_N0[1] | CELL.QUAD_V0[0] | !MAIN[46][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][4] |
| CELL.DOUBLE_IO_N0[2] | CELL.QUAD_V2[1] | !MAIN[39][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][4] |
| CELL.DOUBLE_IO_N0[3] | CELL.QUAD_V1[2] | !MAIN[39][6] |
| CELL.DOUBLE_IO_N1[0] | CELL.QUAD_V2[0] | !MAIN[41][6] |
| CELL.DOUBLE_IO_N1[1] | CELL.QUAD_V1[1] | !MAIN[42][5] |
| CELL.DOUBLE_IO_N1[2] | CELL.QUAD_V0[1] | !MAIN[40][6] |
| CELL.DOUBLE_IO_N1[3] | CELL.QUAD_V0[2] | !MAIN[38][6] |
| CELL.QUAD_V3[0] | CELL.LONG_IO_H[0] | !MAIN[45][4] |
| CELL.QUAD_V3[1] | CELL.LONG_IO_H[1] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.LONG_IO_H[3] | !MAIN[45][3] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][5] | MAIN[9][5] | MAIN[8][6] | MAIN[9][6] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][4] | MAIN[35][4] | MAIN[36][4] | MAIN[34][6] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][2] | MAIN[28][2] | MAIN[30][2] | MAIN[29][2] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][2] | MAIN[34][2] | MAIN[35][1] | MAIN[35][2] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][2] | MAIN[31][2] | MAIN[33][2] | MAIN[34][1] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][2] | MAIN[7][1] | MAIN[8][1] | MAIN[8][2] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][2] | MAIN[2][1] | MAIN[3][1] | MAIN[3][2] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][2] | MAIN[9][1] | MAIN[10][2] | MAIN[10][1] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][2] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][2] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][1] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][1] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][1] | MAIN[17][3] | MAIN[43][2] | MAIN[44][2] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][4] | MAIN[15][5] | MAIN[19][3] | MAIN[18][6] | MAIN[40][2] | MAIN[38][2] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][4] | MAIN[21][3] | MAIN[22][3] | MAIN[23][3] | MAIN[43][1] | MAIN[44][1] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][2] | MAIN[24][3] | MAIN[39][1] | MAIN[37][1] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][7] | MAIN[44][5] | MAIN[43][6] | MAIN[42][6] | MAIN[44][6] | MAIN[45][6] | MAIN[46][6] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL.OUT_COUT_E |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[3] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][3] | MAIN[29][3] | MAIN[37][3] | MAIN[39][4] | MAIN[38][4] | MAIN[37][4] | MAIN[40][3] | MAIN[27][4] | MAIN[30][4] | MAIN[28][4] | MAIN[29][4] | MAIN[28][3] | MAIN[39][3] | MAIN[38][3] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[45][4] | MAIN_E[46][3] | MAIN[3][3] | MAIN[1][3] | MAIN[4][2] | MAIN[2][4] | MAIN[2][3] | MAIN[3][4] | MAIN_E[46][4] | MAIN_E[47][4] | MAIN_E[48][4] | MAIN_E[48][3] | MAIN[1][4] | MAIN_E[47][3] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][2] | MAIN[24][1] | MAIN[25][1] | MAIN[26][1] | MAIN[27][1] | MAIN[29][1] | MAIN[30][1] | MAIN[28][1] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][1] | MAIN[12][1] | MAIN[11][2] | MAIN[13][2] | MAIN[12][2] | MAIN[14][2] | MAIN[14][1] | MAIN[13][1] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][2] | MAIN[20][2] | MAIN[21][2] | MAIN[22][2] | MAIN[19][1] | MAIN[20][1] | MAIN[22][1] | MAIN[21][1] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][1] | MAIN[17][1] | MAIN[15][2] | MAIN[16][2] | MAIN[17][2] | MAIN[18][2] | MAIN[18][1] | MAIN[16][1] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][5] | MAIN[4][5] | MAIN[7][7] | MAIN[7][5] | MAIN[5][5] | MAIN[7][6] | MAIN[6][6] | MAIN[5][6] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.GCLK[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][5] | MAIN[1][6] | MAIN[12][5] | MAIN[4][6] | MAIN[3][6] | MAIN[3][5] | MAIN[2][6] | MAIN[1][5] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][7] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][7] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][7] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][7] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F2_N | CELL.IMUX_CLB_G2_N |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][7] | CELL.IMUX_IO_T[1] invert by !MAIN[1][7] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| CLKIN | out | CELL.OUT_IO_CLKIN | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][7] | !MAIN[13][7] |
| OFF_SRVAL bit 0 | !MAIN[25][6] | !MAIN[12][6] |
| READBACK_I1 bit 0 | !MAIN[19][4] | !MAIN[18][5] |
| READBACK_I2 bit 0 | !MAIN[19][5] | !MAIN[18][4] |
| READBACK_OQ bit 0 | !MAIN[17][4] | !MAIN[17][5] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][7] | !MAIN[10][7] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][7] | MAIN[11][7] |
| IFF_CE_ENABLE | !MAIN[20][6] | !MAIN[14][5] |
| OFF_CE_ENABLE | !MAIN[31][7] | !MAIN[13][5] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][7] | !MAIN[40][7] |
| IO[0].SLEW | MAIN[34][7] |
|---|---|
| IO[1].SLEW | MAIN[2][7] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][6] | MAIN[24][6] |
|---|---|---|
| IO[1].PULL | MAIN[14][6] | MAIN[13][6] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][7] | MAIN[18][7] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][7] | MAIN[16][6] |
| IO[0].MUX_I2 | MAIN[22][7] | MAIN[21][7] |
| IO[1].MUX_I2 | MAIN[16][7] | MAIN[15][7] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][7] | MAIN[21][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][6] | MAIN[15][6] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][7] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][7] | MAIN[28][7] | MAIN[30][7] | MAIN[32][7] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][7] | MAIN[4][7] | MAIN[8][7] | MAIN[6][7] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[12][7] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C2_N | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[9][4] | !MAIN[7][3] | MAIN[8][4] |
| O1_N | MAIN[9][3] | MAIN[7][4] | !MAIN[8][3] |
| O2_P | !MAIN[4][4] | !MAIN[6][3] | MAIN[5][4] |
| O2_N | MAIN[4][3] | MAIN[6][4] | !MAIN[5][3] |
| O3_P | !MAIN[10][4] | !MAIN[12][3] | MAIN[11][4] |
| O3_N | MAIN[10][3] | MAIN[12][4] | !MAIN[11][3] |
| O4_P | !MAIN[15][4] | !MAIN[13][3] | MAIN[14][4] |
| O4_N | MAIN[15][3] | MAIN[13][4] | !MAIN[14][3] |
Bels COUT
| Pin | Direction | COUT |
|---|---|---|
| O | out | CELL.OUT_COUT |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F2_N | IO[0].O2 |
| CELL.IMUX_CLB_G2_N | IO[1].O2 |
| CELL.IMUX_CLB_C2_N | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[0].CLKIN |
| CELL.OUT_COUT | COUT.O |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | |||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F51 | F50 | F49 | F48 | F47 | F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_N1
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_N[0] | CELL.OCTAL_IO_N[8] | !MAIN[1][2] |
| CELL.OCTAL_IO_N[8] | CELL.OCTAL_IO_N[0] | !MAIN[2][2] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[22][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[26][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[25][2] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DEC_H[0] | !MAIN[20][3] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][2] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[24][8] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][3] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][1] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[30][8] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][3] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][3] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[29][9] |
| CELL.SINGLE_V[3] | CELL.DEC_H[1] | !MAIN[31][3] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][3] |
| CELL.SINGLE_V[4] | CELL.DEC_H[2] | !MAIN[36][3] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][1] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][3] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][1] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][3] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][2] |
| CELL.SINGLE_V[7] | CELL.DEC_H[3] | !MAIN[32][3] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][3] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][1] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][1] |
| CELL.DOUBLE_IO_N0[0] | CELL.DBUF_IO_H[0] | !MAIN[36][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.LONG_V[9] | !MAIN[45][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DBUF_IO_H[0] | !MAIN[35][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.GCLK[5] | !MAIN[38][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DBUF_IO_H[0] | !MAIN[35][6] |
| CELL.DOUBLE_IO_N0[2] | CELL.GCLK[6] | !MAIN[37][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DBUF_IO_H[0] | !MAIN[36][6] |
| CELL.DOUBLE_IO_N0[3] | CELL.LONG_V[6] | !MAIN[43][5] |
| CELL.DOUBLE_IO_N1[0] | CELL.GCLK[4] | !MAIN[39][5] |
| CELL.DOUBLE_IO_N1[1] | CELL.LONG_V[8] | !MAIN[44][4] |
| CELL.DOUBLE_IO_N1[2] | CELL.LONG_V[7] | !MAIN[45][7] |
| CELL.DOUBLE_IO_N1[3] | CELL.GCLK[7] | !MAIN[37][5] |
| CELL.DOUBLE_IO_N2[0] | CELL.DBUF_IO_H[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_N2[1] | CELL.DBUF_IO_H[1] | !MAIN[10][5] |
| CELL.DOUBLE_IO_N2[2] | CELL.DBUF_IO_H[1] | !MAIN[10][6] |
| CELL.DOUBLE_IO_N2[3] | CELL.DBUF_IO_H[1] | !MAIN[11][6] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][1] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][7] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][6] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][2] |
| CELL.QUAD_V2[0] | CELL.DEC_H[1] | !MAIN[41][7] |
| CELL.QUAD_V2[0] | CELL.OUT_COUT_E | !MAIN[45][2] |
| CELL.QUAD_V2[1] | CELL.DEC_H[2] | !MAIN[40][5] |
| CELL.QUAD_V2[2] | CELL.DEC_H[3] | !MAIN[46][2] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][1] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][3] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_N1[0] | !MAIN[19][6] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_N[1] | !MAIN[22][0] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_N0[0] | !MAIN[25][5] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_N2[0] | !MAIN[23][5] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_N[2] | !MAIN[23][0] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_N1[1] | !MAIN[26][4] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_N[3] | !MAIN[27][0] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_N0[1] | !MAIN[27][6] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_N2[1] | !MAIN[28][5] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_N[4] | !MAIN[30][0] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_N1[2] | !MAIN[29][5] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_N[5] | !MAIN[40][0] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_N0[2] | !MAIN[30][6] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][5] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_N[6] | !MAIN[36][0] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][4] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_N[7] | !MAIN[37][0] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_N0[3] | !MAIN[33][5] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][6] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_N[8] | !MAIN[33][0] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N0[1] | !MAIN[28][6] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N1[1] | !MAIN[25][4] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N2[1] | !MAIN[27][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N0[2] | !MAIN[31][6] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N1[2] | !MAIN[30][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N2[2] | !MAIN[29][6] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N0[0] | !MAIN[26][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N1[0] | !MAIN[21][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[22][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N0[3] | !MAIN[34][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][6] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N2[3] | !MAIN[32][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[24][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.QUAD_V1[0] | !MAIN[41][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DOUBLE_IO_N2[1] | !MAIN[26][6] |
| CELL.DOUBLE_IO_N0[1] | CELL.QUAD_V0[0] | !MAIN[46][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][4] |
| CELL.DOUBLE_IO_N0[2] | CELL.QUAD_V2[1] | !MAIN[39][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][4] |
| CELL.DOUBLE_IO_N0[3] | CELL.QUAD_V1[2] | !MAIN[39][6] |
| CELL.DOUBLE_IO_N1[0] | CELL.QUAD_V2[0] | !MAIN[41][6] |
| CELL.DOUBLE_IO_N1[1] | CELL.QUAD_V1[1] | !MAIN[42][5] |
| CELL.DOUBLE_IO_N1[2] | CELL.QUAD_V0[1] | !MAIN[40][6] |
| CELL.DOUBLE_IO_N1[3] | CELL.QUAD_V0[2] | !MAIN[38][6] |
| CELL.QUAD_V3[0] | CELL.LONG_IO_H[0] | !MAIN[45][4] |
| CELL.QUAD_V3[1] | CELL.LONG_IO_H[1] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.LONG_IO_H[3] | !MAIN[45][3] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][5] | MAIN[9][5] | MAIN[8][6] | MAIN[9][6] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][4] | MAIN[35][4] | MAIN[36][4] | MAIN[34][6] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][2] | MAIN[28][2] | MAIN[30][2] | MAIN[29][2] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][2] | MAIN[34][2] | MAIN[35][1] | MAIN[35][2] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][2] | MAIN[31][2] | MAIN[33][2] | MAIN[34][1] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][2] | MAIN[7][1] | MAIN[8][1] | MAIN[8][2] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][2] | MAIN[2][1] | MAIN[3][1] | MAIN[3][2] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][2] | MAIN[9][1] | MAIN[10][2] | MAIN[10][1] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][2] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][2] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][1] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][1] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][1] | MAIN[17][3] | MAIN[43][2] | MAIN[44][2] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][4] | MAIN[15][5] | MAIN[19][3] | MAIN[18][6] | MAIN[40][2] | MAIN[38][2] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][4] | MAIN[21][3] | MAIN[22][3] | MAIN[23][3] | MAIN[43][1] | MAIN[44][1] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][2] | MAIN[24][3] | MAIN[39][1] | MAIN[37][1] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][7] | MAIN[44][5] | MAIN[43][6] | MAIN[42][6] | MAIN[44][6] | MAIN[45][6] | MAIN[46][6] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | CELL.OUT_COUT_E |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[3] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][3] | MAIN[29][3] | MAIN[37][3] | MAIN[39][4] | MAIN[38][4] | MAIN[37][4] | MAIN[40][3] | MAIN[27][4] | MAIN[30][4] | MAIN[28][4] | MAIN[29][4] | MAIN[28][3] | MAIN[39][3] | MAIN[38][3] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[40][4] | MAIN_E[41][3] | MAIN[3][3] | MAIN[1][3] | MAIN[4][2] | MAIN[2][4] | MAIN[2][3] | MAIN[3][4] | MAIN_E[41][4] | MAIN_E[42][4] | MAIN_E[43][4] | MAIN_E[43][3] | MAIN[1][4] | MAIN_E[42][3] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][2] | MAIN[24][1] | MAIN[25][1] | MAIN[26][1] | MAIN[27][1] | MAIN[29][1] | MAIN[30][1] | MAIN[28][1] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][1] | MAIN[12][1] | MAIN[11][2] | MAIN[13][2] | MAIN[12][2] | MAIN[14][2] | MAIN[14][1] | MAIN[13][1] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][2] | MAIN[20][2] | MAIN[21][2] | MAIN[22][2] | MAIN[19][1] | MAIN[20][1] | MAIN[22][1] | MAIN[21][1] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][1] | MAIN[17][1] | MAIN[15][2] | MAIN[16][2] | MAIN[17][2] | MAIN[18][2] | MAIN[18][1] | MAIN[16][1] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][5] | MAIN[4][5] | MAIN[7][7] | MAIN[7][5] | MAIN[5][5] | MAIN[7][6] | MAIN[6][6] | MAIN[5][6] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.GCLK[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][5] | MAIN[1][6] | MAIN[12][5] | MAIN[4][6] | MAIN[3][6] | MAIN[3][5] | MAIN[2][6] | MAIN[1][5] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][7] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][7] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][7] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][7] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F2_N | CELL.IMUX_CLB_G2_N |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][7] | CELL.IMUX_IO_T[1] invert by !MAIN[1][7] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][7] | !MAIN[13][7] |
| OFF_SRVAL bit 0 | !MAIN[25][6] | !MAIN[12][6] |
| READBACK_I1 bit 0 | !MAIN[19][4] | !MAIN[18][5] |
| READBACK_I2 bit 0 | !MAIN[19][5] | !MAIN[18][4] |
| READBACK_OQ bit 0 | !MAIN[17][4] | !MAIN[17][5] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][7] | !MAIN[10][7] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][7] | MAIN[11][7] |
| IFF_CE_ENABLE | !MAIN[20][6] | !MAIN[14][5] |
| OFF_CE_ENABLE | !MAIN[31][7] | !MAIN[13][5] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][7] | !MAIN[40][7] |
| IO[0].SLEW | MAIN[34][7] |
|---|---|
| IO[1].SLEW | MAIN[2][7] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][6] | MAIN[24][6] |
|---|---|---|
| IO[1].PULL | MAIN[14][6] | MAIN[13][6] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][7] | MAIN[18][7] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][7] | MAIN[16][6] |
| IO[0].MUX_I2 | MAIN[22][7] | MAIN[21][7] |
| IO[1].MUX_I2 | MAIN[16][7] | MAIN[15][7] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][7] | MAIN[21][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][6] | MAIN[15][6] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][7] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][7] | MAIN[28][7] | MAIN[30][7] | MAIN[32][7] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][7] | MAIN[4][7] | MAIN[8][7] | MAIN[6][7] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[12][7] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C2_N | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[9][4] | !MAIN[7][3] | MAIN[8][4] |
| O1_N | MAIN[9][3] | MAIN[7][4] | !MAIN[8][3] |
| O2_P | !MAIN[4][4] | !MAIN[6][3] | MAIN[5][4] |
| O2_N | MAIN[4][3] | MAIN[6][4] | !MAIN[5][3] |
| O3_P | !MAIN[10][4] | !MAIN[12][3] | MAIN[11][4] |
| O3_N | MAIN[10][3] | MAIN[12][4] | !MAIN[11][3] |
| O4_P | !MAIN[15][4] | !MAIN[13][3] | MAIN[14][4] |
| O4_N | MAIN[15][3] | MAIN[13][4] | !MAIN[14][3] |
Bels COUT
| Pin | Direction | COUT |
|---|---|---|
| O | out | CELL.OUT_COUT |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F2_N | IO[0].O2 |
| CELL.IMUX_CLB_G2_N | IO[1].O2 |
| CELL.IMUX_CLB_C2_N | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
| CELL.OUT_COUT | COUT.O |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Tile IO_N1_W
Cells: 3
Switchbox INT
| Destination | Source | Bit |
|---|---|---|
| CELL.OCTAL_IO_N[0] | CELL.OCTAL_IO_N[8] | !MAIN[1][2] |
| CELL.OCTAL_IO_N[8] | CELL.OCTAL_IO_N[0] | !MAIN[2][2] |
| CELL.LONG_H[0] | CELL.SINGLE_V[1] | !MAIN_S[22][8] |
| CELL.LONG_H[1] | CELL.SINGLE_V[2] | !MAIN_S[26][8] |
| CELL.LONG_H[2] | CELL.SINGLE_V[3] | !MAIN[25][2] |
| Destination | Source | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DEC_H[0] | !MAIN[20][3] |
| CELL.SINGLE_V[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[23][2] |
| CELL.SINGLE_V[1] | CELL.LONG_H[0] | !MAIN_S[24][8] |
| CELL.SINGLE_V[1] | CELL.LONG_IO_H[0] | !MAIN[16][3] |
| CELL.SINGLE_V[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[23][1] |
| CELL.SINGLE_V[2] | CELL.LONG_H[1] | !MAIN_S[30][8] |
| CELL.SINGLE_V[2] | CELL.LONG_IO_H[1] | !MAIN[18][3] |
| CELL.SINGLE_V[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][3] |
| CELL.SINGLE_V[3] | CELL.LONG_H[2] | !MAIN_S[29][9] |
| CELL.SINGLE_V[3] | CELL.DEC_H[1] | !MAIN[31][3] |
| CELL.SINGLE_V[3] | CELL.OUT_IO_SN_I1_E1 | !MAIN[30][3] |
| CELL.SINGLE_V[4] | CELL.DEC_H[2] | !MAIN[36][3] |
| CELL.SINGLE_V[4] | CELL.OUT_IO_SN_I2_E1 | !MAIN[36][1] |
| CELL.SINGLE_V[5] | CELL.LONG_IO_H[2] | !MAIN[34][3] |
| CELL.SINGLE_V[5] | CELL.OUT_IO_SN_I2[0] | !MAIN[33][1] |
| CELL.SINGLE_V[6] | CELL.LONG_IO_H[3] | !MAIN[35][3] |
| CELL.SINGLE_V[6] | CELL.OUT_IO_SN_I1[0] | !MAIN[26][2] |
| CELL.SINGLE_V[7] | CELL.DEC_H[3] | !MAIN[32][3] |
| CELL.SINGLE_V[7] | CELL.OUT_IO_SN_I1_E1 | !MAIN[33][3] |
| CELL.DOUBLE_V0[0] | CELL.OUT_IO_SN_I1_E1 | !MAIN[22][4] |
| CELL.DOUBLE_V0[1] | CELL.OUT_IO_SN_I2[0] | !MAIN[32][1] |
| CELL.DOUBLE_V1[0] | CELL.OUT_IO_SN_I1[0] | !MAIN[21][4] |
| CELL.DOUBLE_V1[1] | CELL.OUT_IO_SN_I2_E1 | !MAIN[31][1] |
| CELL.DOUBLE_IO_N0[0] | CELL.DBUF_IO_H[0] | !MAIN[36][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.LONG_V[9] | !MAIN[45][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DBUF_IO_H[0] | !MAIN[35][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.GCLK[5] | !MAIN[38][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DBUF_IO_H[0] | !MAIN[35][6] |
| CELL.DOUBLE_IO_N0[2] | CELL.GCLK[6] | !MAIN[37][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DBUF_IO_H[0] | !MAIN[36][6] |
| CELL.DOUBLE_IO_N0[3] | CELL.LONG_V[6] | !MAIN[43][5] |
| CELL.DOUBLE_IO_N1[0] | CELL.GCLK[4] | !MAIN[39][5] |
| CELL.DOUBLE_IO_N1[1] | CELL.LONG_V[8] | !MAIN[44][4] |
| CELL.DOUBLE_IO_N1[2] | CELL.LONG_V[7] | !MAIN[45][7] |
| CELL.DOUBLE_IO_N1[3] | CELL.GCLK[7] | !MAIN[37][5] |
| CELL.DOUBLE_IO_N2[0] | CELL.DBUF_IO_H[1] | !MAIN[11][5] |
| CELL.DOUBLE_IO_N2[1] | CELL.DBUF_IO_H[1] | !MAIN[10][5] |
| CELL.DOUBLE_IO_N2[2] | CELL.DBUF_IO_H[1] | !MAIN[10][6] |
| CELL.DOUBLE_IO_N2[3] | CELL.DBUF_IO_H[1] | !MAIN[11][6] |
| CELL.QUAD_V0[0] | CELL.OUT_IO_SN_I2[0] | !MAIN[46][1] |
| CELL.QUAD_V0[1] | CELL.OUT_IO_SN_I1_E1 | !MAIN[38][7] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I1[0] | !MAIN[37][6] |
| CELL.QUAD_V0[2] | CELL.OUT_IO_SN_I2_E1 | !MAIN[37][2] |
| CELL.QUAD_V2[0] | CELL.DEC_H[1] | !MAIN[41][7] |
| CELL.QUAD_V2[1] | CELL.DEC_H[2] | !MAIN[40][5] |
| CELL.QUAD_V2[2] | CELL.DEC_H[3] | !MAIN[46][2] |
| CELL.QUAD_V3[0] | CELL.OUT_IO_SN_I2_E1 | !MAIN[39][2] |
| CELL.QUAD_V3[1] | CELL.OUT_IO_SN_I1[0] | !MAIN[46][4] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I2[0] | !MAIN[45][1] |
| CELL.QUAD_V3[2] | CELL.OUT_IO_SN_I1_E1 | !MAIN[44][3] |
| Side A | Side B | Bit |
|---|---|---|
| CELL.SINGLE_V[0] | CELL.DOUBLE_IO_N1[0] | !MAIN[19][6] |
| CELL.SINGLE_V[0] | CELL.OCTAL_IO_N[1] | !MAIN[22][0] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_N0[0] | !MAIN[25][5] |
| CELL.SINGLE_V[1] | CELL.DOUBLE_IO_N2[0] | !MAIN[23][5] |
| CELL.SINGLE_V[1] | CELL.OCTAL_IO_N[2] | !MAIN[23][0] |
| CELL.SINGLE_V[2] | CELL.DOUBLE_IO_N1[1] | !MAIN[26][4] |
| CELL.SINGLE_V[2] | CELL.OCTAL_IO_N[3] | !MAIN[27][0] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_N0[1] | !MAIN[27][6] |
| CELL.SINGLE_V[3] | CELL.DOUBLE_IO_N2[1] | !MAIN[28][5] |
| CELL.SINGLE_V[3] | CELL.OCTAL_IO_N[4] | !MAIN[30][0] |
| CELL.SINGLE_V[4] | CELL.DOUBLE_IO_N1[2] | !MAIN[29][5] |
| CELL.SINGLE_V[4] | CELL.OCTAL_IO_N[5] | !MAIN[40][0] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_N0[2] | !MAIN[30][6] |
| CELL.SINGLE_V[5] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][5] |
| CELL.SINGLE_V[5] | CELL.OCTAL_IO_N[6] | !MAIN[36][0] |
| CELL.SINGLE_V[6] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][4] |
| CELL.SINGLE_V[6] | CELL.OCTAL_IO_N[7] | !MAIN[37][0] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_N0[3] | !MAIN[33][5] |
| CELL.SINGLE_V[7] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][6] |
| CELL.SINGLE_V[7] | CELL.OCTAL_IO_N[8] | !MAIN[33][0] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N0[1] | !MAIN[28][6] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N1[1] | !MAIN[25][4] |
| CELL.DOUBLE_V0[0] | CELL.DOUBLE_IO_N2[1] | !MAIN[27][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N0[2] | !MAIN[31][6] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N1[2] | !MAIN[30][5] |
| CELL.DOUBLE_V0[1] | CELL.DOUBLE_IO_N2[2] | !MAIN[29][6] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N0[0] | !MAIN[26][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N1[0] | !MAIN[21][5] |
| CELL.DOUBLE_V1[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[22][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N0[3] | !MAIN[34][5] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N1[3] | !MAIN[32][6] |
| CELL.DOUBLE_V1[1] | CELL.DOUBLE_IO_N2[3] | !MAIN[32][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.DOUBLE_IO_N2[0] | !MAIN[24][5] |
| CELL.DOUBLE_IO_N0[0] | CELL.QUAD_V1[0] | !MAIN[41][5] |
| CELL.DOUBLE_IO_N0[1] | CELL.DOUBLE_IO_N2[1] | !MAIN[26][6] |
| CELL.DOUBLE_IO_N0[1] | CELL.QUAD_V0[0] | !MAIN[46][5] |
| CELL.DOUBLE_IO_N0[2] | CELL.DOUBLE_IO_N2[2] | !MAIN[31][4] |
| CELL.DOUBLE_IO_N0[2] | CELL.QUAD_V2[1] | !MAIN[39][7] |
| CELL.DOUBLE_IO_N0[3] | CELL.DOUBLE_IO_N2[3] | !MAIN[33][4] |
| CELL.DOUBLE_IO_N0[3] | CELL.QUAD_V1[2] | !MAIN[39][6] |
| CELL.DOUBLE_IO_N1[0] | CELL.QUAD_V2[0] | !MAIN[41][6] |
| CELL.DOUBLE_IO_N1[1] | CELL.QUAD_V1[1] | !MAIN[42][5] |
| CELL.DOUBLE_IO_N1[2] | CELL.QUAD_V0[1] | !MAIN[40][6] |
| CELL.DOUBLE_IO_N1[3] | CELL.QUAD_V0[2] | !MAIN[38][6] |
| CELL.QUAD_V3[0] | CELL.LONG_IO_H[0] | !MAIN[45][4] |
| CELL.QUAD_V3[1] | CELL.LONG_IO_H[1] | !MAIN[46][3] |
| CELL.QUAD_V3[2] | CELL.LONG_IO_H[3] | !MAIN[45][3] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[8][5] | MAIN[9][5] | MAIN[8][6] | MAIN[9][6] | CELL.DBUF_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N2[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N2[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[34][4] | MAIN[35][4] | MAIN[36][4] | MAIN[34][6] | CELL.DBUF_IO_H[1] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.DOUBLE_IO_N0[1] |
| 0 | 1 | 0 | 1 | CELL.DOUBLE_IO_N0[2] |
| 0 | 1 | 1 | 0 | CELL.DOUBLE_IO_N0[3] |
| 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[27][2] | MAIN[28][2] | MAIN[30][2] | MAIN[29][2] | CELL.LONG_V[0] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[3] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[36][2] | MAIN[34][2] | MAIN[35][1] | MAIN[35][2] | CELL.LONG_V[1] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[32][2] | MAIN[31][2] | MAIN[33][2] | MAIN[34][1] | CELL.LONG_V[2] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2_E1 |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[7][2] | MAIN[7][1] | MAIN[8][1] | MAIN[8][2] | CELL.LONG_V[3] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[2] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[6][2] | MAIN[2][1] | MAIN[3][1] | MAIN[3][2] | CELL.LONG_V[4] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[1] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[9][2] | MAIN[9][1] | MAIN[10][2] | MAIN[10][1] | CELL.LONG_V[5] |
| Source | ||||
| 0 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | CELL.DEC_H[0] |
| 0 | 1 | 1 | 1 | CELL.OUT_IO_SN_I2[0] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][2] | CELL.LONG_V[6] |
| Source | |
| 0 | CELL.LONG_IO_H[0] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[41][2] | CELL.LONG_V[7] |
| Source | |
| 0 | CELL.LONG_IO_H[1] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[42][1] | CELL.LONG_V[8] |
| Source | |
| 0 | CELL.LONG_IO_H[2] |
| 1 | off |
| Bits | Destination |
|---|---|
| MAIN[38][1] | CELL.LONG_V[9] |
| Source | |
| 0 | CELL.LONG_IO_H[3] |
| 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][1] | MAIN[17][3] | MAIN[43][2] | MAIN[44][2] | CELL.LONG_IO_H[0] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[0] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[1] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[6] |
| 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[24][4] | MAIN[15][5] | MAIN[19][3] | MAIN[18][6] | MAIN[40][2] | MAIN[38][2] | CELL.LONG_IO_H[1] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[1] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[7] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||||
|---|---|---|---|---|---|---|
| MAIN[23][4] | MAIN[21][3] | MAIN[22][3] | MAIN[23][3] | MAIN[43][1] | MAIN[44][1] | CELL.LONG_IO_H[2] |
| Source | ||||||
| 0 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_V[2] |
| 0 | 0 | 1 | 0 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 0 | 0 | CELL.LONG_V[8] |
| 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[6] |
| 1 | 1 | 1 | 1 | 1 | 1 | off |
| Bits | Destination | |||
|---|---|---|---|---|
| MAIN[5][2] | MAIN[24][3] | MAIN[39][1] | MAIN[37][1] | CELL.LONG_IO_H[3] |
| Source | ||||
| 0 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | CELL.SINGLE_V[6] |
| 1 | 1 | 0 | 0 | CELL.LONG_V[9] |
| 1 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | off |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[42][7] | MAIN[44][5] | MAIN[43][6] | MAIN[42][6] | MAIN[44][6] | MAIN[45][6] | MAIN[46][6] | CELL.VCLK |
| Source | |||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[0] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | CELL.OUT_IO_SN_I1[0] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | CELL.OUT_IO_SN_I1_E1 |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.LONG_IO_H[3] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[2] |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.BUFGE_H |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N0[3] |
| Bits | Destination | ||||||
|---|---|---|---|---|---|---|---|
| MAIN[40][4] | MAIN[42][4] | MAIN[43][4] | MAIN[41][3] | MAIN[43][3] | MAIN[42][3] | MAIN[41][4] | CELL.ECLK_H |
| Source | |||||||
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | CELL.GCLK[4] |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | CELL.LONG_IO_H[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_W.OUT_BUFGE_V |
| 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.SINGLE_V[5] |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN[27][3] | MAIN[29][3] | MAIN[37][3] | MAIN[39][4] | MAIN[38][4] | MAIN[37][4] | MAIN[40][3] | MAIN[27][4] | MAIN[30][4] | MAIN[28][4] | MAIN[29][4] | MAIN[28][3] | MAIN[39][3] | MAIN[38][3] | CELL.IMUX_IO_O1[0] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[4] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.GCLK[7] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.LONG_V[5] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V0[0] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.LONG_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.LONG_V[4] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DEC_H[2] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_V1[1] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MAIN_E[40][4] | MAIN_E[41][3] | MAIN[3][3] | MAIN[1][3] | MAIN[4][2] | MAIN[2][4] | MAIN[2][3] | MAIN[3][4] | MAIN_E[41][4] | MAIN_E[42][4] | MAIN_E[43][4] | MAIN_E[43][3] | MAIN[1][4] | MAIN_E[42][3] | CELL.IMUX_IO_O1[1] |
| Source | ||||||||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.LONG_IO_H[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[0] |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.LONG_V[1] |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.DOUBLE_V1[0] |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.DOUBLE_V0[1] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[0] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL_E.LONG_V[2] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.GCLK[4] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | CELL_E.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | CELL_E.LONG_IO_H[1] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL_E.GCLK[6] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL_E.LONG_IO_H[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | CELL_E.GCLK[7] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[24][2] | MAIN[24][1] | MAIN[25][1] | MAIN[26][1] | MAIN[27][1] | MAIN[29][1] | MAIN[30][1] | MAIN[28][1] | CELL.IMUX_IO_OK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[11][1] | MAIN[12][1] | MAIN[11][2] | MAIN[13][2] | MAIN[12][2] | MAIN[14][2] | MAIN[14][1] | MAIN[13][1] | CELL.IMUX_IO_OK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[5] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[4] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[19][2] | MAIN[20][2] | MAIN[21][2] | MAIN[22][2] | MAIN[19][1] | MAIN[20][1] | MAIN[22][1] | MAIN[21][1] | CELL.IMUX_IO_IK[0] |
| Source | ||||||||
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[2] |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[2] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[4] |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[5] |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | CELL.ECLK_H |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.GCLK[0] |
| 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.SINGLE_V[3] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[15][1] | MAIN[17][1] | MAIN[15][2] | MAIN[16][2] | MAIN[17][2] | MAIN[18][2] | MAIN[18][1] | MAIN[16][1] | CELL.IMUX_IO_IK[1] |
| Source | ||||||||
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | CELL.GCLK[1] |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | CELL.GCLK[2] |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | CELL.GCLK[3] |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CELL.GCLK[5] |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | CELL.GCLK[6] |
| 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | CELL.GCLK[7] |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | CELL.ECLK_H |
| 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.GCLK[4] |
| 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[2] |
| 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | CELL_E.SINGLE_V[3] |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | CELL_E.SINGLE_V[4] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL_E.SINGLE_V[5] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[6][5] | MAIN[4][5] | MAIN[7][7] | MAIN[7][5] | MAIN[5][5] | MAIN[7][6] | MAIN[6][6] | MAIN[5][6] | CELL.IMUX_IO_T[0] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.DEC_H[2] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.GCLK[0] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[3] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| Bits | Destination | |||||||
|---|---|---|---|---|---|---|---|---|
| MAIN[2][5] | MAIN[1][6] | MAIN[12][5] | MAIN[4][6] | MAIN[3][6] | MAIN[3][5] | MAIN[2][6] | MAIN[1][5] | CELL.IMUX_IO_T[1] |
| Source | ||||||||
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | CELL.TIE_0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | CELL.GCLK[0] |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | CELL.DEC_H[3] |
| 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CELL.LONG_IO_H[0] |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | CELL.LONG_IO_H[3] |
| 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | CELL.LONG_IO_H[2] |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[1] |
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | CELL.DOUBLE_IO_N2[1] |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | CELL.DOUBLE_IO_N2[0] |
| 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | CELL.LONG_IO_H[1] |
| 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | CELL.DEC_H[2] |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | CELL.DOUBLE_IO_N1[0] |
Bels IO
| Pin | Direction | IO[0] | IO[1] |
|---|---|---|---|
| IK | in | CELL.IMUX_IO_IK[0] invert by !MAIN[23][7] | CELL.IMUX_IO_IK[1] invert by !MAIN[14][7] |
| OK | in | CELL.IMUX_IO_OK[0] invert by !MAIN[33][7] | CELL.IMUX_IO_OK[1] invert by !MAIN[3][7] |
| O1 | in | CELL.IMUX_IO_O1[0] | CELL.IMUX_IO_O1[1] |
| O2 | in | CELL.IMUX_CLB_F2_N | CELL.IMUX_CLB_G2_N |
| T | in | CELL.IMUX_IO_T[0] invert by !MAIN[35][7] | CELL.IMUX_IO_T[1] invert by !MAIN[1][7] |
| I1 | out | CELL.OUT_IO_SN_I1[0] | CELL.OUT_IO_SN_I1[1] |
| I2 | out | CELL.OUT_IO_SN_I2[0] | CELL.OUT_IO_SN_I2[1] |
| CLKIN | out | CELL.OUT_IO_CLKIN | - |
| Attribute | IO[0] | IO[1] |
|---|---|---|
| SLEW | [enum: IO_SLEW] | [enum: IO_SLEW] |
| PULL | [enum: IO_PULL] | [enum: IO_PULL] |
| IFF_SRVAL bit 0 | !MAIN[24][7] | !MAIN[13][7] |
| OFF_SRVAL bit 0 | !MAIN[25][6] | !MAIN[12][6] |
| READBACK_I1 bit 0 | !MAIN[19][4] | !MAIN[18][5] |
| READBACK_I2 bit 0 | !MAIN[19][5] | !MAIN[18][4] |
| READBACK_OQ bit 0 | !MAIN[17][4] | !MAIN[17][5] |
| MUX_I1 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| MUX_I2 | [enum: IO_MUX_I] | [enum: IO_MUX_I] |
| IFF_D | [enum: IO_IFF_D] | [enum: IO_IFF_D] |
| OFF_D_INV | !MAIN[26][7] | !MAIN[10][7] |
| MUX_OFF_D | [enum: IO_MUX_OFF_D] | [enum: IO_MUX_OFF_D] |
| MUX_O | [enum: IO_MUX_O] | [enum: IO_MUX_O] |
| OFF_USED | MAIN[25][7] | MAIN[11][7] |
| IFF_CE_ENABLE | !MAIN[20][6] | !MAIN[14][5] |
| OFF_CE_ENABLE | !MAIN[31][7] | !MAIN[13][5] |
| SYNC_D | [enum: IO_SYNC_D] | [enum: IO_SYNC_D] |
| IFF_CE_ENABLE_NO_IQ | !MAIN[43][7] | !MAIN[40][7] |
| IO[0].SLEW | MAIN[34][7] |
|---|---|
| IO[1].SLEW | MAIN[2][7] |
| FAST | 0 |
| SLOW | 1 |
| IO[0].PULL | MAIN[23][6] | MAIN[24][6] |
|---|---|---|
| IO[1].PULL | MAIN[14][6] | MAIN[13][6] |
| NONE | 1 | 1 |
| PULLUP | 0 | 1 |
| PULLDOWN | 1 | 0 |
| IO[0].MUX_I1 | MAIN[20][7] | MAIN[18][7] |
|---|---|---|
| IO[1].MUX_I1 | MAIN[17][7] | MAIN[16][6] |
| IO[0].MUX_I2 | MAIN[22][7] | MAIN[21][7] |
| IO[1].MUX_I2 | MAIN[16][7] | MAIN[15][7] |
| I | 0 | 1 |
| IQ | 1 | 1 |
| IQL | 1 | 0 |
| IO[0].IFF_D | MAIN[19][7] | MAIN[21][6] |
|---|---|---|
| IO[1].IFF_D | MAIN[17][6] | MAIN[15][6] |
| I | 1 | 1 |
| DELAY | 0 | 0 |
| MEDDELAY | 0 | 1 |
| SYNC | 1 | 0 |
| IO[0].MUX_OFF_D | MAIN[27][7] |
|---|---|
| IO[1].MUX_OFF_D | MAIN[9][7] |
| O1 | 1 |
| O2 | 0 |
| IO[0].MUX_O | MAIN[29][7] | MAIN[28][7] | MAIN[30][7] | MAIN[32][7] |
|---|---|---|---|---|
| IO[1].MUX_O | MAIN[5][7] | MAIN[4][7] | MAIN[8][7] | MAIN[6][7] |
| O1 | 0 | 0 | 0 | 0 |
| O1_INV | 0 | 0 | 0 | 1 |
| O2 | 0 | 1 | 1 | 1 |
| O2_INV | 1 | 1 | 1 | 1 |
| OQ | 0 | 0 | 1 | 0 |
| MUX | 1 | 0 | 1 | 1 |
| IO[0].SYNC_D | MAIN[22][6] |
|---|---|
| IO[1].SYNC_D | MAIN[12][7] |
| I | 1 |
| DELAY | 0 |
Bels DEC
| Pin | Direction | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|---|
| I | in | CELL.OUT_IO_SN_I1[0] | CELL.IMUX_CLB_C2_N | CELL.OUT_IO_SN_I1[1] |
| O1 | bidir | CELL.DEC_H[0] | CELL.DEC_H[0] | CELL.DEC_H[0] |
| O2 | bidir | CELL.DEC_H[1] | CELL.DEC_H[1] | CELL.DEC_H[1] |
| O3 | bidir | CELL.DEC_H[2] | CELL.DEC_H[2] | CELL.DEC_H[2] |
| O4 | bidir | CELL.DEC_H[3] | CELL.DEC_H[3] | CELL.DEC_H[3] |
| Attribute | DEC[0] | DEC[1] | DEC[2] |
|---|---|---|---|
| O1_P | !MAIN[9][4] | !MAIN[7][3] | MAIN[8][4] |
| O1_N | MAIN[9][3] | MAIN[7][4] | !MAIN[8][3] |
| O2_P | !MAIN[4][4] | !MAIN[6][3] | MAIN[5][4] |
| O2_N | MAIN[4][3] | MAIN[6][4] | !MAIN[5][3] |
| O3_P | !MAIN[10][4] | !MAIN[12][3] | MAIN[11][4] |
| O3_N | MAIN[10][3] | MAIN[12][4] | !MAIN[11][3] |
| O4_P | !MAIN[15][4] | !MAIN[13][3] | MAIN[14][4] |
| O4_N | MAIN[15][3] | MAIN[13][4] | !MAIN[14][3] |
Bels COUT
| Pin | Direction | COUT |
|---|---|---|
| O | out | CELL.OUT_COUT |
Bel wires
| Wire | Pins |
|---|---|
| CELL.DEC_H[0] | DEC[0].O1, DEC[1].O1, DEC[2].O1 |
| CELL.DEC_H[1] | DEC[0].O2, DEC[1].O2, DEC[2].O2 |
| CELL.DEC_H[2] | DEC[0].O3, DEC[1].O3, DEC[2].O3 |
| CELL.DEC_H[3] | DEC[0].O4, DEC[1].O4, DEC[2].O4 |
| CELL.IMUX_CLB_F2_N | IO[0].O2 |
| CELL.IMUX_CLB_G2_N | IO[1].O2 |
| CELL.IMUX_CLB_C2_N | DEC[1].I |
| CELL.IMUX_IO_O1[0] | IO[0].O1 |
| CELL.IMUX_IO_O1[1] | IO[1].O1 |
| CELL.IMUX_IO_OK[0] | IO[0].OK |
| CELL.IMUX_IO_OK[1] | IO[1].OK |
| CELL.IMUX_IO_IK[0] | IO[0].IK |
| CELL.IMUX_IO_IK[1] | IO[1].IK |
| CELL.IMUX_IO_T[0] | IO[0].T |
| CELL.IMUX_IO_T[1] | IO[1].T |
| CELL.OUT_IO_SN_I1[0] | IO[0].I1, DEC[0].I |
| CELL.OUT_IO_SN_I1[1] | IO[1].I1, DEC[2].I |
| CELL.OUT_IO_SN_I2[0] | IO[0].I2 |
| CELL.OUT_IO_SN_I2[1] | IO[1].I2 |
| CELL.OUT_IO_CLKIN | IO[0].CLKIN |
| CELL.OUT_COUT | COUT.O |
Bitstream
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[3] ← CELL.LONG_H[2] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | INT: !pass CELL.SINGLE_V[2] ← CELL.LONG_H[1] | - | - | - | INT: !buffer CELL.LONG_H[1] ← CELL.SINGLE_V[2] | - | INT: !pass CELL.SINGLE_V[1] ← CELL.LONG_H[0] | - | INT: !buffer CELL.LONG_H[0] ← CELL.SINGLE_V[1] | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F46 | F45 | F44 | F43 | F42 | F41 | F40 | F39 | F38 | F37 | F36 | F35 | F34 | F33 | F32 | F31 | F30 | F29 | F28 | F27 | F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 3 | INT: mux CELL.IMUX_IO_O1[1] bit 4 | INT: mux CELL.IMUX_IO_O1[1] bit 5 | INT: mux CELL.IMUX_IO_O1[1] bit 13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | INT: mux CELL.IMUX_IO_O1[1] bit 2 | INT: mux CELL.IMUX_IO_O1[1] bit 0 | INT: mux CELL.IMUX_IO_O1[1] bit 12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| Bit | Frame | ||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| F26 | F25 | F24 | F23 | F22 | F21 | F20 | F19 | F18 | F17 | F16 | F15 | F14 | F13 | F12 | F11 | F10 | F9 | F8 | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | |
| B7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| B0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |